Diodes with multiple junctions
View Patent ↗A diode includes a semiconductor substrate having a surface; a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type; and a second contact region disposed at the surface, laterally spaced from the first contact region, and having a second conductivity type. The diode also includes a buried region disposed in the semiconductor substrate vertically adjacent to the first contact region, having the second conductivity type, and electrically connected with the second contact region; and an isolation region disposed at the surface between the first and second contact regions. The diode also includes a separation region disposed at the surface between the first contact region and the isolation region, the separation region formed from a portion of a first well region disposed in the semiconductor substrate that extends to the surface.
1. A diode comprising:
a semiconductor substrate having a surface;
a first contact region disposed at the surface of the semiconductor substrate and having a first conductivity type;
a second contact region disposed at the surface of the semiconductor substrate, laterally spaced from the first contact region, and having a second conductivity type,
a buried region disposed in the semiconductor substrate, the buried region vertically adjacent to the first contact region, the buried region having the second conductivity type, and electrically connected with the second contact region;
an isolation region disposed at the surface of the semiconductor substrate between the first contact region and the second contact region; and
a separation region disposed at the surface of the semiconductor substrate between the first contact region and the isolation region, the separation region formed from a portion of first well region disposed in the semiconductor substrate that extends to the surface.
2. The diode of claim 1 , wherein
an inner vertical junction is established at an interface between the first contact region and the buried region.
3. The diode of claim 1 , wherein
a lateral junction is established at an interface between a lateral edge of the first contact region and the separation region.
4. The diode of claim 1 , further comprising:
an intermediate region disposed at the surface of the semiconductor substrate between the first contact region and the separation region, electrically connected with the first contact region, and having the first conductivity type,
wherein the intermediate region comprises one or more regions disposed at the surface of the semiconductor substrate and electrically connected with the first contact region.
5. The diode of claim 4 , wherein
a lateral junction is established at an interface between a lateral edge of the intermediate region and the separation region.
6. The diode of claim 1 , wherein
the first well region is centered under the first contact region and extends laterally across at least a portion of the first contact region, and
a vertical junction is established at an interface between the first contact region and the first well region.
7. The diode of claim 1 , further comprising:
a centered well region disposed in the semiconductor substrate centered under the first contact region, the centered well region is vertically adjacent to the buried region, the centered well region extends laterally across at least a portion of the buried region, wherein
the first well region is laterally adjacent to the centered well region.
8. The diode of claim 7 , wherein
the centered well region further extends laterally across at least a portion of the first contact region, and
a vertical junction is established at an interface between the first contact region and the centered well region.
9. The diode of claim 7 , further comprising:
an intermediate region disposed at the surface of the semiconductor substrate laterally adjacent between the first contact region and the separation region, electrically connected with the first contact region, and having the first conductivity type, wherein
the centered well region further extends laterally across at least a portion of the intermediate region, and
a vertical junction is established at an interface between the intermediate region and the centered well region.
10. The diode of claim 1 , further comprising:
a second well region disposed in the semiconductor substrate under at least a portion of the isolation region and laterally adjacent to the first well region, having the second conductivity type, and electrically connected to the second contact region, wherein
the second well region has a higher dopant concentration than the first well region.
11. The diode of claim 10 , further comprising:
a third well region disposed in the semiconductor substrate laterally adjacent to the second well region, having the second conductivity type, and electrically connected to the second contact region, wherein
the third well region has a higher dopant concentration than the second well region.
12. The diode of claim 1 , further comprising:
an outer well region disposed in the semiconductor substrate under at least a portion of the second contact region and laterally adjacent to the first well region, having the second conductivity type, and electrically connected to the second contact region, wherein
the outer well region has a higher dopant concentration than the first well region.
13. The diode of claim 1 , wherein the isolation region comprises a shallow trench isolation (STI) region.
14. The diode of claim 1 , further comprising:
a silicide block supported by the semiconductor substrate and disposed over the separation region.
15. The diode of claim 1 , wherein the diode comprises one of a group including a Zener diode and a low voltage diode.