FinFET device formed by a replacement metal-gate method including a gate cut-last step
View Patent ↗A technique relates to forming a semiconductor device. A starting semiconductor device having a fin structure patterned in a substrate, and a gate formed over the fin structure, the gate having a mid-region and an end-region is first provided. A trench is then patterned over the mid-region of the gate and a trench is patterned over the end-region of the gate. The patterned trenches are then etched over the mid-region of the gate and the end-region of the gate to form the trenches. A conformal low-k dielectric layer can then be deposited over the structure to fill the trenches and pinch off the trench formed in the mid-region and the trench formed in the end-region.
1. A self-aligned interconnect structure, comprising:
a fin structure patterned in a substrate;
a gate disposed over the fin, the gate has a length and a width, and the length is greater than the width;
a pair of gate spacers arranged on opposing terminal ends of the length of the gate;
a first trench formed in a mid-region of the gate comprising a bottom wall formed of the substrate and a plurality of side walls formed of a gate metal and a work function metal stack; and
and a second trench formed in an end-region of the gate comprising a bottom wall formed of the substrate, a first side wall formed of a spacer of the pair of spacers, and a second side wall formed of the gate metal and the work function metal stack;
wherein the first trench and the second trench are free of metal residue.
2. The self-aligned interconnect structure of claim 1 , further comprising a conformal low-k dielectric layer disposed in the trench formed in the mid-region of the gate and the trench formed in the end-region of the gate.
3. The self-aligned interconnect structure of claim 2 , further comprising an inter-layer dielectric layer disposed over the conformal low-k dielectric layer disposed in the trench formed in the mid-region of the gate.