Patent Assignment
Reel/Frame 073658/0462
Change of Name
Recorded: 2025-11-21
Pages: 8
Assignor
TESSERA, INC.
Executed: 2021-10-01
Assignee
TESSERA LLC
3025 ORCHARD PARKWAY, SAN JOSE, CALIFORNIA, 95134
Covered Properties
(100)
Microstructure Modification in Copper Interconnect Structure
Interconnect Structures Incorporating Air-Gap Spacers
Interconnect Structures Incorporating Air-Gap Spacers
Spin Transfer Torque Cell for Magnetic Random Access Memory
Wafer-Scale Package Structures with Integrated Antennas
Multi-Layer Work Function Metal Replacement Gate
Multi-Layer Work Function Metal Replacement Gate
Patent:
8,647,972 →
Application:
13/618,255 →
Overlap Capacitance Nanowire
Overlap Capacitance Nanowire
Stacked Semiconductor Nanowires with Tunnel Spacers
Fin Density Control of Multigate Devices Through Sidewall Image Transfer Processes
Gate Structure Integration Scheme for Fin Field Effect Transistors
Very Planar Gate Cut Post Replacement Gate Process
Lowering Parasitic Capacitance of Replacement Metal Gate Processes
Semiconductor Device Including Merged-Unmerged Work Function Metal and Variable Fin Pitch
Self-Aligned Contact Process Enabled by Low Temperature
Silicon Nanowire Formation in Replacement Metal Gate Process
Fin Cut on Sit Level
Patent:
9,269,627 →
Application:
14/501,654 →
Air Gap Semiconductor Structure with Selective Cap Bilayer
Patent:
9,305,836 →
Application:
14/536,751 →
Replacement Metal Gate Dielectric Cap
Finfet Device with Vertical Silicide on Recessed Source/Drain Epitaxy Regions
Trenched Gate with Sidewall Airgap Spacer
Air Gap Contact Formation for Reducing Parasitic Capacitance
Overlap Capacitance Nanowire
Stable Multiple Threshold Voltage Devices on Replacement Metal Gate Cmos Devices
Fin Density Control of Multigate Devices Through Sidewall Image Transfer Processes
Spin Transfer Torque Cell for Magnetic Random Access Memory
Stable Multiple Threshold Voltage Devices on Replacement Metal Gate Cmos Devices
Perpendicular Magnetic Anisotropy Free Layers with Iron Insertion and Oxide Interfaces for Spin Transfer Torque Magnetic Random Access Memory
Low Resistance Metal Contacts to Interconnects
Silicon Nanowire Formation in Replacement Metal Gate Process
Method for Manufacturing Interconnect Structures Incorporating Air Gap Spacers
Interconnect Structures Incorporating Air-Gap Spacers
Finfet Device Formed by a Replacement Metal-Gate Method Including a Gate Cut-Last Step
Asymmetric Finfet Memory Access Transistor
Patent:
9,583,624 →
Application:
14/865,276 →
Bulk Fin Sti Formation
Methods for Removal of Selected Nanowires in Stacked Gate All Around Architecture
Low Resistance Contact Structures Including a Copper Fill for Trench Structures
Low Resistance Contact Structures for Trench Structures
Fin Cut Without Residual Fin Defects
Nanosheet Mosfet with Full-Height Air-Gap Spacer
Patent:
9,362,355 →
Application:
14/940,685 →
Hybrid Airgap Structure with Oxide Liner
Patent:
9,449,871 →
Application:
14/944,355 →
Fin Pitch Scaling for High Voltage Devices and Low Voltage Devices on the Same Wafer
Low Resistance Metal Contacts to Interconnects
Semiconductor Device Replacement Metal Gate with Gate Cut Last in Rmg
Gate Structure Integration Scheme for Fin Field Effect Transistors
Mandrel Removal Last in Lateral Semiconductor Growth and Structure for Same
Patent:
9,455,347 →
Application:
14/959,046 →
Air Gap Semiconductor Structure with Selective Cap Bilayer
Method of Forming an Air Gap Semiconductor Structure with Selective Cap Bilayer
Asymmetric Finfet Memory Access Transistor
Patent:
9,553,173 →
Application:
14/962,082 →
BULK SILICON GERMANIUM FinFET
Advanced Manganese/Manganese Nitride Cap/Etch Mask for Air Gap Formaton Scheme in Nanocopper Low-K Interconnect
Patent:
9,349,687 →
Application:
14/975,725 →
Sidewall Image Transfer Nanosheet
Lowering Parasitic Capacitance of Replacement Metal Gate Processes
Fin Field-Effect Transistor (Finfet) with Reduced Parasitic Capacitance
Stacked Nanowire Devices
Patent:
9,484,267 →
Application:
15/015,347 →
Fin Cut on Sit Level
Interconnect Structures Incorporating Air Gap Spacers
Fin Type Field Effect Transistors with Different Pitches and Substantially Uniform Fin Reveal
Patent:
9,691,765 →
Application:
15/063,735 →
Self-Aligned Contact Process Enabled by Low Temperature
Spin Transfer Torque Cell for Magnetic Random Access Memory
Iii-V Semiconductor Devices with Selective Oxidation
Nanosheet Mosfet with Full-Height Air-Gap Spacer
Patent:
9,508,829 →
Application:
15/146,031 →
Hybrid Subtractive Etch/Metal Fill Process for Fabricating Interconnects
Hybrid Subtractive Etch/Metal Fill Process for Fabricating Interconnects
Hybrid Airgap Structure with Oxide Liner
Replacement Metal Gate Dielectric Cap
Finfet Device with Vertical Silicide on Recessed Source/Drain Epitaxy Regions
Replacement Metal Gate Dielectric Cap
Low Resistance Contact Structures for Trench Structures
Low Resistance Contact Structures for Trench Structures
Nanosheet Mosfet with Full-Height Air-Gap Spacer
Air Gap Contact Formation for Reducing Parasitic Capacitance
Air Gap Contact Formation for Reducing Parasitic Capacitance
Fin Pitch Scaling for High Voltage Devices and Low Voltage Devices on the Same Wafer
Finfet Device with Vertical Silicide on Recessed Source/Drain Epitaxy Regions
Stable Multiple Threshold Voltage Devices on Replacement Metal Gate Cmos Devices
Perpendicular Magnetic Anisotropy Free Layers with Iron Insertion and Oxide Interfaces for Spin Transfer Torque Magnetic Random Access Memory
Self-Aligned Contact Process Enabled by Low Temperature
Hybrid Subtractive Etch/Metal Fill Process for Fabricating Interconnects
Hybrid Subtractive Etch/Metal Fill Process for Fabricating Interconnects
Methods For Removal Of Selected Nanowires In Stacked Gate All Around Architecture
Fin Type Field Effect Transistors with Different Pitches and Substantially Uniform Fin Reveal
FIN FIELD-EFFECT TRANSISTOR (FinFET) WITH REDUCED PARASITIC CAPACITANCE
Low Resistance Contact Structures for Trench Structures
Low Resistance Contact Structures for Trench Structures
Sidewall Image Transfer Nanosheet
Fin Density Control of Multigate Devices Through Sidewall Image Transfer Processes
Fin Pitch Scaling for High Voltage Devices and Low Voltage Devices on the Same Wafer
Fin Cut Without Residual Fin Defects
Spin Transfer Torque Cell for Magnetic Random Access Memory
Fin Pitch Scaling for High Voltage Devices and Low Voltage Devices on the Same Wafer
Perpendicular Magnetic Anisotropy Free Layers with Iron Insertion and Oxide Interfaces for Spin Transfer Torque Magnetic Random Access Memory
Fin Type Field Effect Transistors with Different Pitches and Substantially Uniform Fin Reveal
Self-Aligned Contact Process Enabled by Low Temperature
Sidewall Image Transfer Nanosheet
Spin Transfer Torque Cell for Magnetic Random Access Memory
Iii-V Semiconductor Devices with Selective Oxidation
Homogeneous Densification of Fill Layers for Controlled Reveal of Vertical Fins
Sidewall Image Transfer Nanosheet
Related Assignments
(15)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Sep 13, 2012
From: ANDO, TAKASHI; DASGUPTA, ARITRA; KWON, UNOH; POLVINO, SEAN M.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 028958/0964 →
Assignment of Assignor's Interest
Jan 11, 2013
From: LEOBANDUNG, EFFENDI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 029611/0791 →
Assignment of Assignor's Interest
Aug 20, 2013
From: LEOBANDUNG, EFFENDI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 031042/0917 →
Assignment of Assignor's Interest
Sep 16, 2013
From: LEOBANDUNG, EFFENDI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 031214/0691 →
Assignment of Assignor's Interest
Jan 28, 2014
From: HE, HONG; TSENG, CHIAHSUN; YEH, CHUN-CHEN; YIN, YUNPENG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032066/0655 →
Assignment of Assignor's Interest
Feb 7, 2014
From: HE, HONG; TSENG, CHIAHSUN; YEH, CHUN-CHEN; YIN, YUNPENG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032173/0745 →
Assignment of Assignor's Interest
Feb 24, 2014
From: LEOBANDUNG, EFFENDI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032282/0304 →
Assignment of Assignor's Interest
Mar 5, 2014
From: LEOBANDUNG, EFFENDI; NARAYANAN, VIJAY
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032357/0083 →
Assignment of Assignor's Interest
Mar 26, 2014
From: BASKER, VEERARAGHAVAN S.; LIU, ZUOGUANG; YAMASHITA, TENKO; YEH, CHUN-CHEN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032528/0865 →
Assignment of Assignor's Interest
Mar 27, 2014
From: HE, HONG; TSENG, CHIAHSUN; YEH, CHUN-CHEN; YIN, YUNPENG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 032542/0149 →
Assignment of Assignor's Interest
Jun 11, 2014
From: CHEN, CHIA-YU; LIU, ZUOGUANG; YAMASHITA, TENKO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 033076/0527 →
Assignment of Assignor's Interest
Dec 10, 2019
From: NITTA, SATYA V.; PONOTH, SHOM
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 051224/0491 →
Assignment of Assignor's Interest
Jan 6, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: TESSERA, INC.
Reel/Frame 051489/0557 →
Security Interest
Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
Change of Name
Nov 21, 2025
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 073658/0849 →