Air gap contact formation for reducing parasitic capacitance
View Patent ↗A functional gate structure is located on a surface of a semiconductor material portion and including a U-shaped gate dielectric portion and a gate conductor portion. A source region is located on one side of the functional gate structure, and a drain region is located on another side of the functional gate structure. The source region and drain region both have a topmost surface that is above a topmost surface of the semiconductor material portion and another surface that touches a portion of the U-shaped gate dielectric. A contact structure is located on the topmost surface of the source region and/or the drain region. A middle-of-the-line air gap contact is located between the contact structure and the functional gate structure and above at least one of the source region and the drain region. The middle-of-the-line air gap contact is sealed by a portion of a conformal dielectric material.
1. A method of forming a semiconductor structure, said method comprising:
providing a sacrificial insulator structure on a surface of a semiconductor material portion;
epitaxially growing a source region on one side of the sacrificial insulator structure and a drain region on another side of the sacrificial insulator structure, wherein both said source region and said drain region have a topmost surface that is above a topmost surface of said semiconductor material portion;
replacing said sacrificial insulator structure with a functional gate structure, said functional gate structure comprising a U-shaped gate dielectric portion and a gate conductor portion, and wherein another surface of both said source region and said drain regions contacts a portion of said U-shaped gate dielectric portion;
forming a sacrificial contact material portion within a contact opening and along a vertical sidewall of said functional gate structure;
forming a contact structure on said topmost surface of at least one of said source region and said drain region;
removing said sacrificial contact material portion; and
forming a middle-of the-line air gap contact within a portion of a volume previously occupied by said sacrificial contact material portion.
2. The method of claim 1 , wherein said semiconductor material portion is a semiconductor fin, and said semiconductor fin is formed by patterning a topmost semiconductor material layer of a semiconductor substrate.
3. The method of claim 1 , further comprising forming a planarizing dielectric material prior to replacing said sacrificial insulator structure, said planarizing dielectric material having a topmost surface that is coplanar with a topmost surface of said sacrificial insulator structure.
4. The method of claim 3 , wherein said functional gate structure comprises a dielectric cap portion located on said gate conductor portion, said dielectric cap portion having a topmost surface coplanar with said topmost surface of said planarizing dielectric material.
5. The method of claim 3 , wherein said contact opening is formed by removing said planarizing dielectric material that is located above at least one of said source region and said drain region.
6. The method of claim 5 , wherein said removing said planarizing dielectric material comprises lithography and etching.
7. The method of claim 1 , wherein said forming said sacrificial contact material portion comprises depositing amorphous carbon and etching said amorphous carbon.
8. The method of claim 1 , wherein said forming said contact structure comprises providing a contact metal portion on a surface of a contact metal liner.
9. The method of claim 1 , wherein said removing said sacrificial contact material portion provides an air gap.
10. The method of claim 9 , wherein said forming said middle-of the-line air gap contact comprises sealing said air gap by forming a conformal dielectric material spanning atop said air gap and across both said functional gate structure and said contact structure.
11. A method of forming a semiconductor structure, said method comprising:
providing a sacrificial insulator structure on a surface of a semiconductor material portion;
epitaxially growing a source region on one side of the sacrificial insulator structure and a drain region on another side of the sacrificial insulator structure, wherein both said source region and said drain region have a topmost surface that is above a topmost surface of said semiconductor material portion;
forming a planarizing dielectric material laterally surrounding said sacrificial insulator structure and having a topmost surface that is coplanar with a topmost surface of said sacrificial insulator structure;
replacing said sacrificial insulator structure with a functional gate structure;
forming a sacrificial contact material portion within a contact opening and along a vertical sidewall of said functional gate structure;
forming a contact structure on said topmost surface of at least one of said source region and said drain region;
removing said sacrificial contact material portion to provide an air gap; and
sealing said air gap, wherein said sealing provides a middle-of the-line air gap contact within a portion of a volume previously occupied by said sacrificial contact material portion.
12. The method of claim 11 , wherein said semiconductor material portion is a semiconductor fin, and said semiconductor fin is formed by patterning a topmost semiconductor material layer of a semiconductor substrate.
13. The method of claim 11 , wherein said functional gate structure comprises a U-shaped gate dielectric portion and a gate conductor portion, and wherein another surface of both said source region and said drain regions contacts a portion of said U-shaped gate dielectric portion.
14. The method of claim 13 , wherein said functional gate structure comprises a dielectric cap portion located on said gate conductor portion, said dielectric cap portion having a topmost surface coplanar with said topmost surface of said planarizing dielectric material.
15. The method of claim 11 , wherein said contact opening is formed by removing said planarizing dielectric material that is located above at least one of said source region and said drain region.
16. The method of claim 15 , wherein said removing said planarizing dielectric material comprises lithography and etching.
17. The method of claim 11 , wherein said forming said sacrificial contact material portion comprises depositing amorphous carbon and etching said amorphous carbon.
18. The method of claim 11 , wherein said forming said contact structure comprises providing a contact metal portion on a surface of a contact metal liner.
19. The method of claim 11 , wherein said sealing said air gap comprises forming a conformal dielectric material spanning atop said air gap and across both said functional gate structure and said contact structure.