Replacement metal gate dielectric cap
A method for manufacturing a field effect transistor includes chelating a molecular mask to a replacement metal gate in a field effect transistor. The method may further include forming a patterned dielectric layer on a bulk dielectric material and a gate dielectric barrier in one or more deposition steps. The method may include removing the molecular mask and exposing part of the gate dielectric barrier before depositing a dielectric cap that touches the gate dielectric barrier and the replacement metal gate.
1. An assembly, comprising:
a field effect transistor stack having:
a semiconductor substrate with a horizontal surface;
a bulk dielectric material on the horizontal surface;
a replacement metal gate with:
a gate metal having a metal top surface; and
a gate fill with a fill top surface;
a gate oxide on the horizontal surface and surrounding the gate metal;
at least one spacer on the horizontal surface and between the bulk dielectric material and the gate oxide wherein the chelating mask is directly attached to the metal top surface and the fill top surface of the replacement metal gate, and wherein the chelating mask is further above and adjacent to the bulk dielectric material; and
a chelating mask chelated to the metal top surface and the fill top surface.
2. The assembly of claim 1 , wherein the chelating mask is made of mask molecules with:
a chelating end that is a metal chelating agent; and
a hydrophobic end.
3. The assembly of claim 2 , wherein the hydrophobic end is made from atoms selected from a group consisting of carbon, hydrogen, and fluorine.
4. The assembly of claim 2 , wherein the metal chelating agent is selected from a group consisting of a hydroxamate ester, a phosphonate ester, a carboxylate ester, and an amine.
5. The assembly of claim 4 , wherein the hydrophobic end has an alkyl group with not more than 40 carbon atoms.
6. The assembly of claim 4 , wherein the hydrophobic end has at least one aromatic ring.
7. A semiconductor device, comprising:
a replacement metal gate stack for a field effect transistor, having:
a semiconductor substrate with a horizontal surface;
a bulk dielectric material on the horizontal surface;
a replacement metal gate, wherein a dummy gate is etched away to form an opening, the replacement metal gate being deposited into the opening, and wherein the replacement metal gate includes:
a gate metal having a metal top surface, and
a gate fill with a fill top surface;
a gate oxide on the horizontal surface abutting the gate metal, the gate oxide abutting an inside of at least on spacer, the gate oxide being further on top of a channel;
the at least one spacer on the horizontal surface and between the bulk dielectric material and abutting the gate oxide, the at least one spacer being above and adjacent to the channel; and
a dielectric cap on the metal top surface and the fill top surface, and touching the at least one spacer.
8. The semiconductor device of claim 7 , further comprising a seed layer between the at least one spacer and the dielectric cap.
9. The semiconductor device of claim 8 , wherein the seed layer includes aluminum.
10. The semiconductor device of claim 7 , further comprising a patterned dielectric layer directly on the bulk dielectric material only, wherein the patterned dielectric layer is not on the replacement metal gate or the dielectric cap.
11. The semiconductor device of claim 10 , wherein the patterned dielectric layer is made from an oxide selected from a group consisting of silicon dioxide and hafnium oxide.
12. The semiconductor device of claim 7 , wherein a seed layer is between the bulk dielectric material and a patterned dielectric layer.
13. The semiconductor device of claim 12 , further comprising the patterned dielectric layer grown from the seed layer on the bulk dielectric material.
14. The semiconductor device of claim 7 , wherein the dielectric cap further touches an interior surface of the one spacer, and wherein the replacement metal gate is recessed downward.
15. An assembly, comprising:
a field effect transistor stack having:
a semiconductor substrate with a horizontal surface;
a bulk dielectric material on the horizontal surface;
a replacement metal gate with:
a gate metal having a metal top surface; and
a gate fill with a fill top surface;
a gate oxide on the horizontal surface;
at least one spacer on the horizontal surface; and
a chelating mask chelated to the metal top surface and the fill top surface, the chelating mask comprising:
a chelating end sharing at least one electron with at least one atom of the metal top surface and the fill top surface, and
a hydrophobic end that includes a plurality of ends that attract, the attracting causing the plurality of ends to point upward and away from the replacement metal gate, wherein the chelating end is in between the hydrophobic end and the replacement metal gate.
16. The assembly of claim 1 , further comprising a patterned layer deposited directly on top of the bulk dielectric material and on an exposed top edge of each of the at least one spacer.
17. The assembly of claim 1 , further comprising:
a seed layer on the bulk dielectric material and surrounding the chelating end, and
a patterned oxide layer on the seed layer and surrounding the chelating end and the hydrophobic end.