Nanosheet MOSFET with full-height air-gap spacer

1. A semiconductor device, comprising:

a gate positioned on a substrate;

a nanosheet that extends through the gate, protrudes from a sidewall of the gate, and forms a recess between the substrate and the nanosheet;

a dielectric spacer disposed in the recess;

a source/drain contact positioned on a source/drain disposed on the substrate adjacent to the gate;

an air gap spacer positioned along the sidewall of the gate and in contact with a dielectric material disposed on the nanosheet, the air gap spacer being in contact with the source/drain contact; and

an interlayer dielectric (ILD) disposed on the air gap spacer.

2. The semiconductor device of claim 1 , wherein the nanosheet comprises silicon or silicon germanium.

3. The semiconductor device of claim 1 , wherein the dielectric spacer and the dielectric material include the same material.

4. The semiconductor device of claim 1 , further comprising a gate cap disposed on the gate and adjacent to the air gap spacer.

5. The semiconductor device of claim 1 , wherein the air gap spacer extends from the dielectric material to contact a gate cap positioned on the gate.

6. The semiconductor device of claim 1 , wherein the dielectric material is a low-k dielectric material.