Surface finishes for interconnection pads in microelectronic structures
View Patent ↗A surface finish may be formed in a microelectronic structure, wherein the surface finish may include an interlayer comprising a refractory metal, phosphorus, and nickel, with the refractory metal having a content of between about 2 and 12% by weight and the phosphorus having a content of between about 2 and 12% by weight with the remainder being nickel. In one embodiment, the refractory metal of the interlayer may consist of one of tungsten, molybdenum, and ruthenium. In another embodiment, the interlayer may comprise the refractory metal being tungsten having a content of between about 5 and 6% by weight and phosphorus having a content of between about 5 and 6% by weight with the remainder being nickel.
1. A microelectronic structure, comprising:
an interconnection pad;
an interlayer on the interconnection pad, wherein the interlayer comprises a refractory metal, phosphorus, and nickel, wherein the refractory metal has a content of between about 2 and 12% by weight and the phosphorus has a content of between about 2 and 12% by weight with the remainder being nickel, and wherein the refractory metal is selected from the group consisting of molybdenum and ruthenium; and
a solder interconnect on the interlayer.
2. The microelectronic structure of claim 1 , further including a barrier layer disposed between the interlayer and the solder interconnect.
3. The microelectronic structure of claim 2 , wherein the barrier layer comprises a palladium-containing material.
4. The microelectronic structure of claim 1 , further including an oxidation resistant/solder wetting layer disposed between the interlayer and the solder interconnect.
5. The microelectronic structure of claim 4 , wherein the oxidation resistant/solder wetting layer comprises gold.
6. A method for fabricating a microelectronic structure, comprising:
forming an interconnection pad;
forming an interlayer on the interconnection pad, wherein the interlayer comprises a refractory metal, phosphorus, and nickel, wherein the refractory metal has a content of between about 2 and 12% by weight and the phosphorus has a content of between about 2 and 12% by weight with the remainder being nickel, and wherein the refractory metal is selected from the group consisting of molybdenum and ruthenium; and
forming a solder interconnect on the interlayer.
7. The method of claim 6 , further including forming a barrier layer between the interlayer and the solder interconnect.
8. The method of claim 7 , wherein forming the barrier layer comprises forming a palladium-containing barrier layer.
9. The method of claim 6 , further including forming an oxidation resistant/solder wetting layer between the interlayer and the solder interconnect.
10. The method of claim 9 , wherein forming the oxidation resistant/solder wetting layer comprises forming a gold oxidation resistant/solder wetting layer.
11. An electronic system, comprising:
a board; and
a microelectronic package attached to the board, wherein at least one of the microelectronic package and the board includes:
an interconnection pad;
an interlayer on the interconnection pad, wherein the interlayer comprises a refractory metal, phosphorus, and nickel, wherein the refractory metal has a content of between about 2 and 12% by weight and the phosphorus has a content of between about 2 and 12% by weight with the remainder being nickel, and wherein the refractory metal is selected from the group consisting of molybdenum and ruthenium; and
a solder interconnect on the interlayer.
12. The electronic system of claim 11 , further including a barrier layer disposed between the interlayer and the solder interconnect.
13. The electronic system of claim 12 , wherein the barrier layer comprises a palladium-containing material.
14. The electronic system of claim 11 , further including an oxidation resistant/solder wetting layer disposed between the interlayer and the solder interconnect.
15. The electronic system of claim 14 , wherein the oxidation resistant/solder wetting layer comprises gold.