Integrated circuit shielding technique utilizing stacked die technology incorporating top and bottom nickel-iron alloy shields having a low coefficient of thermal expansion
View Patent ↗An integrated circuit shielding technique utilizing stacked die technology incorporating top and bottom nickel-iron alloy shields having a low coefficient of thermal expansion of especial utility in conjunction with magnetoresistive random access memory (MRAM) and other devices requiring magnetic shielding.
1. A method for forming an integrated circuit device comprising:
providing a device package having a cavity in an upper surface thereof;
directly bonding a substantially planar first shield member to said device package within said cavity by applying a relatively thin bondline interposed between said device package and said first shield member;
also bonding an integrated circuit die overlying said first shield by applying a relatively thin bondline interposed between said first shield member and said integrated circuit die;
further directly bonding a substantially planar second shield member overlying said integrated circuit die by applying a relatively thick bondline interposed between said integrated circuit die and said second shield member; and
attaching a lid to said device package laterally of said cavity overlying said second shield member and displaced therefrom.
2. The method of claim 1 wherein said step of providing a device package is carried out by providing a ceramic device package.
3. The method of claim 1 wherein said relatively thin bondline comprises a thickness of substantially 2.0 mils.
4. The method of claim 1 wherein said first shield member comprises a high permeability, high saturation ferromagnetic material having a low coefficient of thermal expansion.
5. The method of claim 4 wherein said ferroelectric material comprises Invar.
6. The method of claim 1 wherein said relatively thin bondline comprises a thickness of substantially 2.0 mils.
7. The method of claim 1 wherein said integrated circuit die comprises an MRAM device.
8. The method of claim 1 wherein said relatively thick bondline comprises a thickness of substantially 10.0 mils.
9. The method of claim 1 wherein said lid comprises a controlled expansion nickel-cobalt ferrous alloy.
10. The method of claim 9 wherein said alloy comprises Kovar®.
11. The method of claim 1 wherein said first and second shield members are substantially the same size.
12. The method of claim 11 wherein said first and second shield members are substantially the same size as said integrated circuit die.
13. The method of claim 11 wherein said first and second shield members are larger than said integrated circuit die.
14. The method of claim 1 wherein said second shield member is larger than said first shield member.
15. The method of claim 1 wherein said second shield member is attached to said device package laterally of said cavity and medially of said lid.
16. The method of claim 1 further comprising the step of extending wirebonds from said integrated circuit die.
17. The method of claim 1 wherein said steps of bonding, also bonding and further bonding are carried out using a low outgassing epoxy die attach material.