Patent Assignment
Reel/Frame 068326/0038
Change of Name
Recorded: 2024-08-05
Pages: 6
Assignor
CAES COLORADO SPRINGS LLC
Executed: 2023-01-23
Assignee
FRONTGRADE COLORADO SPRINGS LLC
4350 CENTENNIAL BLVD., COLORADO SPRINGS, COLORADO, 80907-3486
Covered Properties
(50)
Total Ionizing Dose Suppression Transistor Architecture
Temperature Insensitive Reference Circuit for Use in a Voltage Detection Circuit
Set and Segr Resistant Delay Cell and Delay Line for Power-on Reset Circuit Applications
Radiation Hardened Logic Circuit
High Speed Voltage Translator Circuit
Current Comparator Using Wide Swing Current Mirrors
Autodetect Feature for a Spacewire Application
Two Component Photodiode Detector
Data Throttling Circuit and Method for a Spacewire Application
Cross-Talk and Back Side Shielding in a Front Side Illuminated Photo Detector Diode Array
Total Ionizing Dose Suppression Transistor Architecture
Energy Sensitive Direct Conversion Radiation Detector
Radiation Tolerant Circuit for Minimizing the Dependence of a Precision Voltage Reference from Ground Bounce and Signal Glitch
Continuous-Time Circuit and Method for Capacitance Equalization Based on Electrically Tunable Voltage Pre-Distortion of a C-V Characteristic
Electrically Tunable Continuous-Time Circuit and Method for Compensating a Polynomial Voltage-Dependent Characteristic of Capacitance
Tungsten Stiffener for Flexible Substrate Assembly
Amplitude-Stabilized Odd Order Pre-Distortion Circuit
Amplitude-Stabilized Even Order Pre-Distortion Circuit
Single Event Transient Direct Measurement Methodology and Circuit
Circuit and Method for Reducing the Propagation of Single Event Transient Effects
Wafer Structure for Electronic Integrated Circuit Manufacturing
Wafer Structure for Electronic Integrated Circuit Manufacturing
Wafer Structure for Electronic Integrated Circuit Manufacturing
Wafer Structure for Electronic Integrated Circuit Manufacturing
Continuous-Time Circuit and Method for Capacitance Equalization Based on Electrically Tunable Voltage Pre-Distortion of a C-V Characteristic
Electrically Tunable Continuous-Time Circuit and Method for Compensating a Polynomial Voltage-Dependent Characteristic of Capacitance
Single Event Transient Direct Measurement Methodology and Circuit
High-Gain Low-Noise Preamplifier and Associated Amplification and Common-Mode Control Method
Integrated Circuit Shielding Technique Utilizing Stacked Die Technology Incorporating Top and Bottom Nickel-Iron Alloy Shields Having a Low Coefficient of Thermal Expansion
Low-Noise Low-Distortion Signal Acquisition Circuit and Method with Reduced Area Utilization
Voltage Regulator for Systems with a High Dynamic Current Range
Method for Synchronizing a Multiplicity of Clock Generating Circuits
Patent:
9,231,592 →
Application:
14/469,361 →
Method for Concurrent System Management and Error Detection and Correction Requests in Integrated Circuits Through Location Aware Avoidance Logic
Method for Creating a Reliable Phase-Locked Loop in a Ruggedized or Harsh Environment
Patent:
9,270,284 →
Application:
14/524,988 →
High-Gain Low-Noise Preamplifier and Associated Amplification and Common-Mode Control Method
Low-Noise Low-Distortion Signal Acquisition Circuit and Method with Reduced Area Utilization
Baseline Restore Sampling Method
Integrated Circuit Shielding Technique Utilizing Stacked Die Technology Incorporating Top and Bottom Nickel-Iron Alloy Shields Having a Low Coefficient of Thermal Expansion
Wafer Structure for Electronic Integrated Circuit Manufacturing
Bias-Starving Circuit with Precision Monitoring Loop for Voltage Regulators with Enhanced Stability
Wafer Structure for Electronic Integrated Circuit Manufacturing
Wafer Structure for Electronic Integrated Circuit Manufacturing
Wafer Structure for Electronic Integrated Circuit Manufacturing
Minimal-Energy Up/Down Counting Apparatus and Method for Extremely Low-Power Applications
Radiation-Hardened Break Before Make Circuit
Radiation-Hardened Break Before Make Circuit
Flip Chip Assembly
Methods of Modelling Irregular Shaped Transistor Devices in Circuit Simulation
Patent:
10,846,451 →
Application:
16/509,171 →
Detection and Correction of Single Event Upset (Seu) in Integrated Circuit
Pll with Multiple and Adjustable Phase Outputs
Related Assignments
(7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Dec 18, 2009
From: ZANCHI, ALFIO; HISANO, SHINICHI
To: AEROFLEX COLORADO SPRINGS INC.
Reel/Frame 023677/0664 →
Release of Patent Security Interest
Sep 12, 2014
From: JPMRGAN CHASE BANK, N.A.
To: AEROFLEX INCORPORATED; AEROFLEX/WEINSCHEL, INC.; AEROFLEX COLORADO SPRINGS, INC.; AEROFLEX MICROELECTRONIC SOLUTIONS, INC.
Reel/Frame 033728/0942 →
Release of Security Interest
Mar 2, 2021
From: JPMORGAN CHASE BANK, N.A.
To: AEROFLEX INCORPORATED; AEROFLEX/WEINSCHEL, INC.; AEROFLEX COLORADO SPRINGS, INC.; AEROFLEX MICROELECTRONIC SOLUTIONS, INC.
Reel/Frame 055461/0294 →
Change of Name
Apr 7, 2021
From: AEROFLEX COLORADO SPRINGS, INC.
To: COBHAM COLORADO SPRINGS INC.
Reel/Frame 055847/0958 →
Entity Conversion
Aug 22, 2022
From: COBHAM COLORADO SPRINGS INC.
To: CAES COLORADO SPRINGS LLC
Reel/Frame 061299/0490 →
Entity Conversion
Aug 22, 2022
From: COBHAM COLORADO SPRINGS INC.
To: CAES COLORADO SPRINGS LLC
Reel/Frame 061299/0532 →
Security Interest
Jan 9, 2023
From: CAES COLORADO SPRINGS LLC; COBHAM ADVANCED ELECTRONIC SOLUTIONS INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 062337/0939 →