IP Library Assignment 033728/0942
Patent Assignment
Reel/Frame 033728/0942

Release of Patent Security Interest

Recorded: 2014-09-12 Pages: 12
Assignor
JPMRGAN CHASE BANK, N.A.
Executed: 2014-09-12
Assignees
AEROFLEX INCORPORATED
35 SOUTH SERVICE ROAD, P.O. BOX 6022, PLAINVIEW, NEW YORK, 11803-0622
AEROFLEX/WEINSCHEL, INC.
5305 SPECTRUM DRIVE, FREDERICK, MARYLAND, 21703-7362
AEROFLEX COLORADO SPRINGS, INC.
4350 CENTENNIAL BLVD., COLORADO SPRINGS, COLORADO, 80907
AEROFLEX MICROELECTRONIC SOLUTIONS, INC.
310 DINO DRIVE, ANN ARBOR, MICHIGAN, 48103
AEROFLEX PLAINVIEW, INC.
35 SOUTH SERVICE ROAD, P.O. BOX 6022, PLAINVIEW, NEW YORK, 11803-0622
AEROFLEX SYSTEMS GROUP, INC.
256 GIBRALTAR DRIVE, SUITE 110, SUNNYVALE, CALIFORNIA, 94089-1337
AEROFLEX WICHITA, INC.
10200 WEST YORK STREET, WICHITA, KANSAS, 67215-8999
Covered Properties (75)
Field Oxide Termination and Gate Oxide
Patent: 5,218,214 →
Application: 07/950,335 →
Mil-Std-1553 Interface Device Having a Bus Controller Minor Frame Timer
Patent: 5,367,641 →
Application: 07/971,434 →
Gate Array Architecture and Layout for Deep Space Applications
Patent: 5,543,736 →
Application: 08/165,236 →
Method of Fabricating an Isolation Trench for Analog Bipolar Devices in Harsh Environments
Patent: 5,561,073 →
Application: 08/226,804 →
Mil-Std-1553 Interface Device Having Autonomous Operation in All Modes
Patent: 5,490,254 →
Application: 08/232,851 →
Method of Making Bipolar Transistor Having Amorphous Silicon Contact as Emitter Diffusion Source
Patent: 5,670,394 →
Application: 08/317,155 →
Method of Enhancing the Current Gain of Bipolar Junction Transistors
Patent: 5,565,370 →
Application: 08/385,005 →
A Method of Making a Low Voltace Coefficient Capacitor
Patent: 5,525,533 →
Application: 08/385,522 →
Antifuse Structure and Process for Manufacturing the Same
Patent: 5,658,819 →
Application: 08/551,387 →
Method of Making an Antifuse Structure Using a Metal Caplayer
Patent: 5,759,876 →
Application: 08/551,588 →
High Reliability Logic Circuit for a Radiation Environment
Patent: 5,870,332 →
Application: 08/635,794 →
Monolithic Data Transmitter and Transceiver Incorporating Such a Transmitter
Patent: 5,838,722 →
Application: 08/638,907 →
Bent Lead Repair Tool for Electronic Components
Patent: 5,778,947 →
Application: 08/854,263 →
Content Addressable Memory (Cam) Engine
Patent: 6,226,710 →
Application: 08/970,718 →
Method of Eliminating Buried Contact Resistance in Integrated Circuits
Patent: 6,008,125 →
Application: 08/990,175 →
Voltage Controlled Resistance Modulation for Single Event Upset Immunity
Patent: 6,271,568 →
Application: 08/999,346 →
Method for Making Recessed Field Oxide for Radiation Hardened Microelectronics
Patent: 6,063,690 →
Application: 08/999,476 →
Soi Combination Body Tie
Patent: 5,811,855 →
Application: 08/999,491 →
Multi-Level Interconnect Metallization Technique
Patent: 6,069,078 →
Application: 09/001,130 →
'Icb Method of Forming High Refractive Index Films"
Patent: 6,022,598 →
Application: 09/061,624 →
Radiation Hardened Semiconductor Device
Patent: 6,511,893 →
Application: 09/072,932 →
Method of Programmability and an Architecture for Cold Sparing of Cmos Arrays
Patent: 6,414,360 →
Application: 09/094,344 →
Raised Pedestal Radiation Shield for Sensitve Electronics
Patent: 6,121,672 →
Application: 09/185,162 →
Apparatus and Method to Determine a Longest Prefix Match in a Content Addressable Memory
Patent: 6,353,873 →
Application: 09/243,041 →
Parameter Adjustment in a Mos Integrated Circuit
Patent: 6,346,427 →
Application: 09/376,246 →
Planar Blind-Mate Connectors
Patent: 6,409,550 →
Application: 09/440,099 →
Search Coprocessor Subsystem Having Multiple Search Engines and Dedicated Key-Table Memory for Connection to a Computer System
Patent: 6,640,220 →
Application: 09/526,069 →
Content Addressable Memory (Cam) Engine
Patent: 6,473,846 →
Application: 09/596,165 →
Method for Fabricating Integrated Circuits
Patent: 6,453,447 →
Application: 09/640,344 →
Gate Array Cell Generator Using Cadence Relative Object Design
Patent: 6,574,786 →
Application: 09/656,256 →
Network-Based Configuration Method for Systems Integration in Test, Measurement, and Automation Environments
Patent: 6,785,805 →
Application: 09/702,087 →
Radiation Shielded Carriers for Sensitive Electronics
Patent: 6,650,003 →
Application: 09/715,291 →
Radiation Shield and Radiation Shielded Integrated Circuit Device
Patent: 6,452,263 →
Application: 09/715,401 →
Radiation Resistant Integrated Circuit Design
Patent: 6,570,234 →
Application: 09/715,819 →
Radiation-Hardened Programmable Device
Patent: 6,917,533 →
Application: 10/045,571 →
Publication: US 2003/0077537
Error Correcting Latch
Patent: 6,573,774 →
Application: 10/107,293 →
Test Configuration and Data Management System and Associated Method for Enterprise Test Operations
Patent: 7,113,883 →
Application: 10/225,825 →
Radiation Hardened Semiconductor Device
Patent: 6,855,618 →
Application: 10/284,230 →
Publication: US 2004/0166648
Digitally Controlled Angle Noise Signal Generator
Patent: 6,756,854 →
Application: 10/284,911 →
Publication: US 2004/0085143
Radiation Hardening Method for Shallow Trench Isolation in Cmos
Patent: 6,890,832 →
Application: 10/292,787 →
Error Correcting Latch
Patent: 6,831,496 →
Application: 10/299,461 →
Publication: US 2003/0179030
Broadband Frequency Agile Signal Characterization
Patent: 7,349,457 →
Application: 10/812,226 →
Publication: US 2005/0227626
Generator for Agile Frequency Signals
Patent: 7,634,239 →
Application: 10/812,227 →
Publication: US 2005/0215208
Error Correcting Latch
Patent: 7,071,749 →
Application: 10/868,706 →
Publication: US 2004/0227551
Total Ionizing Dose Suppression Transistor Architecture
Patent: 7,518,218 →
Application: 11/071,730 →
Publication: US 2006/0197108
Enterprise Test Data Management System Utilizing Hierarchical Test Data Models and Related Methods
Patent: 7,539,591 →
Application: 11/112,083 →
Publication: US 2005/0268171
Radiation-Hardened Programmable Device
Patent: 7,251,150 →
Application: 11/132,799 →
Publication: US 2005/0219891
Temperature Insensitive Reference Circuit for Use in a Voltage Detection Circuit
Patent: 7,800,429 →
Application: 11/336,158 →
Publication: US 2007/0170977
Set and Segr Resistant Delay Cell and Delay Line for Power-on Reset Circuit Applications
Patent: 7,733,146 →
Application: 11/347,903 →
Publication: US 2007/0182474
Radiation Hardened Logic Circuit
Patent: 7,423,448 →
Application: 11/367,951 →
Publication: US 2007/0205799
High Speed Voltage Translator Circuit
Patent: 7,619,459 →
Application: 11/384,010 →
Publication: US 2007/0216443
Current Comparator Using Wide Swing Current Mirrors
Patent: 7,583,108 →
Application: 11/384,013 →
Publication: US 2007/0216447
Regenerative Jammer with Multiple Jamming Algorithms
Patent: 7,532,856 →
Application: 11/398,748 →
Publication: US 2009/0061759
Battery Balancing Including Resonant Frequency Compensation
Patent: 7,592,775 →
Application: 11/443,151 →
Publication: US 2007/0279003
Autodetect Feature for a Spacewire Application
Patent: 7,729,430 →
Application: 11/456,488 →
Publication: US 2008/0008277
Two Component Photodiode Detector
Patent: 7,504,637 →
Application: 11/456,662 →
Publication: US 2008/0011959
Multi-Band Jammer
Patent: 7,697,885 →
Application: 11/522,300 →
Publication: US 2009/0237289
Data Throttling Circuit and Method for a Spacewire Application
Patent: 9,026,692 →
Application: 11/621,503 →
Publication: US 2008/0165037
Cross-Talk and Back Side Shielding in a Front Side Illuminated Photo Detector Diode Array
Patent: 7,544,947 →
Application: 11/681,462 →
Publication: US 2007/0210259
Total Ionizing Dose Suppression Transistor Architecture
Patent: 7,737,535 →
Application: 11/687,588 →
Publication: US 2007/0181978
Compensation for Parasitic Resistance in Battery Monitoring
Patent: 7,786,701 →
Application: 11/773,567 →
Publication: US 2008/0018305
Radiation-Hardened Programmable Device
Patent: 7,656,699 →
Application: 11/774,502 →
Publication: US 2008/0014531
Low-Power Battery System
Patent: 8,058,844 →
Application: 12/028,600 →
Publication: US 2008/0185994
Energy Sensitive Direct Conversion Radiation Detector
Patent: 7,589,327 →
Application: 12/121,480 →
Publication: US 2008/0283764
Radiation Tolerant Circuit for Minimizing the Dependence of a Precision Voltage Reference from Ground Bounce and Signal Glitch
Patent: 9,887,014 →
Application: 12/642,177 →
Publication: US 2011/0148388
Multi-Band Jammer Including Airborne Systems
Patent: 8,170,467 →
Application: 12/728,379 →
Publication: US 2011/0223851
Continuous-Time Circuit and Method for Capacitance Equalization Based on Electrically Tunable Voltage Pre-Distortion of a C-V Characteristic
Patent: 8,237,488 →
Application: 12/775,381 →
Publication: US 2011/0273229
Electrically Tunable Continuous-Time Circuit and Method for Compensating a Polynomial Voltage-Dependent Characteristic of Capacitance
Patent: 8,203,374 →
Application: 12/775,406 →
Publication: US 2011/0273222
Bias-Starving Circuit with Precision Monitoring Loop for Voltage Regulators with Enhanced Stability
Application: 12/816,841 →
Publication: US 2011/0309808
Tungsten Stiffener for Flexible Substrate Assembly
Patent: 8,237,275 →
Application: 12/819,965 →
Publication: US 2011/0309491
Hermetic Packaging and Method of Forming the Same
Application: 12/842,906 →
Publication: US 2011/0037162
Single Event Transient Direct Measurement Methodology and Circuit
Patent: 8,222,916 →
Application: 12/948,004 →
Publication: US 2012/0119780
Interrogator/Transponder Test Set
Patent: 613,191 →
Application: 29/338,811 →
Amplitude-Stabilized Even Order Pre-Distortion Circuit
Application: 61/355,122 →
Amplitude-Stabilized Odd Order Pre-Distortion Circuit
Application: 61/355,126 →