Methods of modelling irregular shaped transistor devices in circuit simulation

1. A circuit simulation method, comprising:

at a computer system including one or more processors and memory:

identifying an irregular shaped transistor device in an integrated circuit computer model, the irregular shaped transistor device having a first active area, a first gate, a first source, a first drain, and a first channel that connects the first source and the first drain, wherein the first channel has an irregular shape defined by design as a non-rectangular area where the first gate overlaps the first active area;

determining using a solver program an equivalent resistance of the first channel of the irregular shaped transistor device based on the irregular shape of the first channel;

determining a first length of the first channel;

determining a first width of the first channel of the irregular shaped transistor device based on the equivalent resistance of the first channel and the first length of the first channel; and

converting the irregular shaped transistor device to a regular shaped transistor device having a second active area, a second gate, a second source, a second drain, and a second channel defined by a rectangular area in subsequent analysis of the integrated circuit computer model, where the second gate overlaps the second active area, and has a second width and a second length that are equivalent to the first width and the first length of the first channel of the irregular shaped transistor device.

2. The method of claim 1 , wherein determining using the solver program the equivalent resistance of the first channel of the irregular shaped transistor device further includes:

executing a field solver program; and

determining, in the field solver program, the equivalent resistance of the first channel of the irregular shaped transistor device based on a small signal excitation model, further including:

identifying at least one of a first terminal associated with the first source and a second terminal associated with the first drain;

determining S-parameters of the first channel of the irregular shaped transistor device in response to a small excitation signal at the first terminal associated with the first source;

converting the S-parameters to Z-parameters of the first channel of the irregular shaped transistor device; and

determining the equivalent resistance of the first channel based on the Z-parameters of the first channel.

3. The method of claim 1 , wherein determining using the solver program the equivalent resistance of the first channel of the irregular shaped transistor device further includes:

executing a device solver program; and

determining, in the device solver program, the equivalent resistance of the first channel of the irregular shaped transistor device based on direct current (DC) electrical behavior of the irregular shaped transistor device, further including:

identifying a first terminal associated with the first source;

determining one or more current-voltage curves of the first channel of the irregular shaped transistor device in response to a DC voltage applied at the first terminal associated with the first source; and

determining the equivalent resistance of the first channel based on the one or more current-voltage curves of the first channel.

4. The method of claim 1 , comprising:

identifying a predetermined equivalent resistance model based on the irregular shape;

determining a set of device characteristics of the irregular shaped transistor device; and

in accordance with the predetermined equivalent resistance model, determining the equivalent resistance of the first channel of the irregular shaped transistor device based on the set of device characteristics.

5. The method of claim 4 , wherein the set of device characteristics includes one or more combinations of values of the device characteristics, and the predetermined equivalent resistance model includes a lookup table associating each of the one or more combinations of the values of the device characteristics with a respective equivalent resistance of the first channel.

6. The method of claim 5 , wherein the equivalent resistance of the first channel of the irregular shaped transistor device is interpolated from two equivalent resistances in the lookup table.

7. The method of claim 4 , wherein the predetermined equivalent resistance model is established using one of a field solver program and a device solver program, and stored in the memory of the computer system, the field solver program being configured to determine the equivalent resistance of the first channel based on analysis of electrical field in the first channel, the device solver program being configured to determine the equivalent resistance of the first channel based on current-voltage behavior of the irregular shaped transistor device.

8. The method of claim 7 , further comprising:

determining, in the field solver program, the predetermined equivalent resistance model based on a small signal excitation model, further including:

identifying a plurality of device characteristics for the irregular shaped transistor device;

for each of one or more combinations of values of the plurality of device characteristics:

identifying at least one of a first terminal associated with the first source and a second terminal associated with the first drain;

determining S-parameters of the first channel of the irregular shaped transistor device in response to a small excitation signal at the first terminal associated with the first source;

converting the S-parameters to Z-parameters of the first channel of the irregular shaped transistor device;

determining a respective equivalent resistance of the first channel based on the Z-parameters of the first channel; and

associating, in a lookup table, the respective combination of values of the plurality of device characteristics with the respective equivalent resistance of the first channel.

9. The method of claim 1 , wherein the length of the first channel is determined based on locations of the first source and the first drain, and determining the length of the first channel includes averaging a distance between the first source and the first drain along a width of the first channel of the irregular shaped transistor device.

10. The method of claim 1 , wherein determining the length of the first channel includes:

identifying a minimum length and a maximum length along a width of the first channel of the irregular shaped transistor device; and

averaging the minimum length and the maximum length to determine the length of the first channel.

11. The method of claim 1 , wherein determining the length of the first channel includes:

identifying a middle point along a width of the first channel of the irregular shaped transistor device; and

determining a channel length at the middle point to represent the length of the first channel.

12. The method of claim 1 , wherein:

one of the first source and the first drain is disposed in a center region of the irregular shape, and the other one of the first source and the first drain is disposed in proximity to a periphery of the irregular shape.

13. A computer system, comprising:

one or more processors; and

memory storing one or more programs for execution by the one or more processors, the one or more programs comprising instructions for:

identifying an irregular shaped transistor device in an integrated circuit computer model, the irregular shaped transistor device having a first active area, a first gate, a first source, a first drain, and a first channel that connects the first source and the first drain, wherein the first channel has an irregular shape defined by design as a non-rectangular area where the first gate overlaps the first active area;

determining using a solver program an equivalent resistance of the first channel of the irregular shaped transistor device based on the irregular shape of the first channel;

determining a first length of the first channel;

determining a first width of the first channel of the irregular shaped transistor device based on the equivalent resistance of the first channel and the first length of the first channel; and

converting the irregular shaped transistor device to a regular shaped transistor device having a second active area, a second gate, a second source, a second drain, and a second channel defined by a rectangular area in subsequent analysis of the integrated circuit computer model, where the second gate overlaps the second active area, and has a second width and a second length that are equivalent to the first width and the first length of the first channel of the irregular shaped transistor device.

14. The computer system of claim 13 , wherein the irregular shape is one of predefined hollow rectangular, hollow hexagonal, hollow octagonal and hollow circular shapes.

15. The computer system of claim 13 , wherein the first gate includes an array of openings, and each opening is configured to accommodate a contact for one of the first source and first drain.

16. The computer system of claim 13 , wherein the computer system includes a local client device and a server system, and the server system is installed with a circuit simulation program and/or a solver program configured to implement the subsequent analysis of the integrated circuit computer model.

17. A non-transitory computer readable storage medium storing one or more programs configured for execution by one or more processors of a computer system, the one or more programs comprising instructions for:

identifying an irregular shaped transistor device in an integrated circuit computer model, the irregular shaped transistor device having a first active area, a first gate, a first source, a first drain, and a first channel that connects the first source and the first drain, wherein the first channel has an irregular shape defined by design as a non-rectangular area where the first gate overlaps the first active area;

determining using a solver program an equivalent resistance of the first channel of the irregular shaped transistor device based on the irregular shape of the first channel;

determining a first length of the first channel;

determining a first width of the first channel of the irregular shaped transistor device based on the equivalent resistance of the first channel and the first length of the first channel; and

converting the irregular shaped transistor device to a regular shaped transistor device having a second active area, a second gate, a second source, a second drain, and a second channel defined by a rectangular area in subsequent analysis of the integrated circuit computer model, where the second gate overlaps the second active area, and has a second width and a second length that are equivalent to the first width and the first length of the first channel of the irregular shaped transistor device.

18. The non-transitory computer readable storage medium of claim 17 , the one or more programs further comprising instructions for:

determining a sheet resistance of the first channel of the irregular shaped transistor device, wherein the first width of the first channel of the irregular shaped transistor device is determined based on the sheet resistance and the length of the first channel.

19. The non-transitory computer readable storage medium of claim 17 , wherein the subsequent analysis of the integrated circuit computer model is implemented by a circuit simulation program, and the determination of the equivalent resistance of the first channel of the irregular shaped transistor device involves a solver program that is distinct from the circuit simulation program.

20. The non-transitory computer readable storage medium of claim 19 , wherein the circuit simulation program includes a SPICE simulator, and the solver program is configured to solve Maxwell equations related to the first channel of the irregular shaped transistor device.