Semiconductor structure having a source and a drain with reverse facets
A semiconductor structure including a semiconductor wafer. The semiconductor wafer includes a gate structure, a first trench in the semiconductor wafer adjacent to a first side of the gate structure and a second trench adjacent to a second side of the gate structure, the first and second trenches filled with a doped epitaxial silicon to form a source in the filled first trench and a drain in the filled second trench such that each of the source and drain are recessed and have an inverted facet. In a preferred exemplary embodiment, the epitaxial silicon is doped with boron.
1. A method of forming a semiconductor structure comprising:
obtaining a semiconductor wafer;
forming a gate structure on the semiconductor wafer;
forming first and second trenches for a source and a drain, respectively, adjacent to the gate structure, each trench of the first and second trenches having vertical sides extending 90 degrees relative to a bottom of the trench; and
epitaxially growing a doped epitaxial silicon, that is not an alloy or compound of silicon, to partially fill the trenches to form a recessed source and a recessed drain, each having an inverted facet, wherein the inverted facets comprise vertical side walls at the vertical sides at an outer periphery of the source and drain and angled walls extending from the vertical side walls towards a center and a bottom of the source and drain.
2. The method of claim 1 , wherein epitaxially growing includes a silicon precursor and a boron-containing precursor.
3. The method of claim 2 , wherein the boron-containing precursor is Diborane (B 2 H 6 ).
4. The method of claim 1 , wherein the doped silicon is doped with boron.
5. The method of claim 4 , wherein the concentration of the boron is 1×10 19 to 8×10 20 atoms/cm 3 .
6. The method of claim 1 , wherein the doped silicon is doped with an aluminum-containing precursor, a gallium-containing precursor, an indium-containing precursor or a thallium-containing precursor.
7. The method of claim 1 , wherein the bottom of the recessed source and drain is flat.
8. The method of claim 1 , wherein the angled walls meet at the center of the source and drain.
9. The method of claim 1 , wherein the first and second trenches each have a bottom surface and a side surface and the semiconductor wafer is oriented such that the bottom surface of the first and second trenches has a crystal plane orientation of {100} and the side surface of the first and second trenches has a crystal plane orientation of {110}.
10. The method of claim 9 , wherein the angled walls have a crystal plane orientation of {111}.