IP Library Granted Patent US 11,082,541
Granted Patent B2
US 11,082,541 · App. 14/979,730 · Granted Aug 3, 2021

Building, transmitting, and receiving frame structures in power line communications

Inventors: Anand G. Dabak (Plano, TX); Badri N Varadarajan (Mountain View, TX); Il Han Kim (Allen, TX); Tarkesh Pande (Richardson, TX)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H04L69/22H04B3/30H04B3/54H04B3/542H04B10/11H04B2001/6912
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Quick Facts
Patent No.
US 11,082,541
App. No.
14/979,730
Granted
Aug 3, 2021
Kind
B2
Abstract

Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.

Claims (26)

1. A method comprising:

identifying, by a power line communication (PLC) device, a first PLC symbol and a second PLC symbol within a PLC preamble;

inserting, by the PLC device, an instance of the first PLC symbol within a PLC header portion of a first PLC frame;

inserting, by the PLC device, an instance of the second PLC symbol within the PLC header portion of the first PLC frame;

transmitting, by the PLC device, the first PLC frame over a power line;

receiving a second PLC frame;

locating a position of a PLC preamble symbol within a header portion of the second PLC frame; and

estimating a sampling frequency offset based on the located position of the PLC preamble symbol.

2. The method of claim 1 , wherein:

inserting the instance of the first PLC symbol is at a predetermined location within the PLC header portion of the first PLC frame.

3. The method of claim 2 , further comprising:

inserting a second instance of the first PLC symbol at second location within the PLC header portion of the PLC frame.

4. The method of claim 2 , further comprising:

inserting the instance of the second PLC symbol at predetermined second location within the PLC header portion of the PLC frame.

5. The method of claim 2 , further comprising:

estimating a start of the second PLC frame or a sampling frequency offset based on the located position of the PLC preamble symbol.

6. The method of claim 2 , wherein the PLC device is a PLC modem.

7. The method of claim 2 , wherein the PLC device is a gateway.

8. The method of claim 2 , wherein the PLC device is a PLC data concentrator.

9. The method of claim 2 , wherein the PLC device is implemented at least in part as an integrated circuit (IC).

10. The method of claim 9 , wherein the IC is a digital signal processor (DSP).

11. The method of claim 9 , wherein the IC is an application specific integrated circuit (ASIC).

12. The method of claim 9 , wherein the IC is a system on a Chip (SoC) circuit.

13. The method of claim 9 , wherein the IC is a field programmable gate array (FPGA).

14. The method of claim 9 , wherein the IC is a microprocessor.

15. The method of claim 9 , wherein the IC is a microcontroller.

Continuity (9)
Continuation 14169773 · Jan 31, 2014
Division 13269487 · Oct 10, 2011
Provisional Application 61391382 · Oct 8, 2010
Provisional Application 61417657 · Nov 29, 2010
Provisional Application 61418584 · Dec 1, 2010
Provisional Application 61431249 · Jan 10, 2011
Provisional Application 61431899 · Jan 12, 2011
Provisional Application 61434572 · Jan 20, 2011
Related Publication 20160112548A1 · Apr 21, 2016