Electronic package structure having insulated substrate with lands and conductive patterns
View Patent ↗In one embodiment, an electronic package includes a substrate having a plurality of lands embedded within an insulating layer. Conductive patterns are disposed on at least a portion of a respective land top surface. An electronic device is electrically connected to the conductive patterns and a package body encapsulating the top surface of the insulating material and the electronic device, wherein the bottom land surfaces are exposed to the outside. In another embodiment, the top land surfaces and the top surface of the insulating layer are substantially co-planar and the conductive patterns further overlap portions of the top surface of the insulating layer.
1. An electronic package structure comprising:
a substrate comprising:
a plurality of lands laterally spaced apart from each other and comprising a conductive material, wherein each land has a land sidewall surface, a land top surface, and a land bottom surface;
an insulating material disposed along the land sidewall surface of each land, wherein the insulating material has a top surface and an opposing bottom surface, and
a plurality of conductive patterns, wherein each conductive pattern is disposed on at least a portion of a respective land top surface;
an electronic device electrically coupled to the plurality conductive patterns, wherein the electronic device has opposing side surfaces in a cross-sectional view, and wherein each land is disposed laterally inward from the opposing side surfaces in the cross-sectional view; and
a package body encapsulating the top surface of the insulating material and the electronic device, wherein:
the land bottom surfaces are exposed to the outside of the package body;
the land bottom surfaces are exposed to the outside of the insulating material;
the bottom surface of the insulating material is disposed inward with respect to the land bottom surfaces thereby exposing portions of the land sidewall surface of each land; and
the land bottom surfaces are provided without laterally overlapping onto the bottom surface of the insulating material.
2. The structure of claim 1 , wherein:
the top surface of the insulating material is substantially co-planar with the land top surfaces; and
at least one conductive pattern is laterally disposed entirely between the opposing side surfaces.
3. The structure of claim 1 , wherein the land bottom surface of each land is generally flat in cross-sectional view.
4. The structure of claim 1 , further comprising conductive bumps coupled to the land bottom surfaces, wherein the conductive bumps further overlap the exposed land sidewall surfaces of the lands.
5. The structure of claim 1 , wherein:
the electronic device comprises a semiconductor device electrically coupled to the plurality of conductive patterns with a plurality of conductive bumps; and
at least two of the plurality of conductive bumps partially overlap the top surface of the insulating layer and partially overlap the top surface of one of the lands.
6. The structure of claim 1 , wherein at least some conductive patterns are disposed on portions of the top surface of the insulating material.