IP Library Granted Patent US 10,128,194
Granted Patent B1
US 10,128,194 · App. 14/988,563 · Granted Nov 13, 2018

Trace stacking structure and method

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Quick Facts
Patent No.
US 10,128,194
App. No.
14/988,563
Granted
Nov 13, 2018
Kind
B1
Abstract

Methods and systems for a trace stacking structure may comprise a stacked trace including: a first trace that comprises a first seed layer and a first metal layer in a substrate and a second trace that is stacked on the trace. The second trace may include: a second seed layer and a second metal layer, a top surface, a bottom surface opposite the top surface, and sidewalls extending between the top surface and the bottom surface and may be wholly within the width of the trace laterally. A dielectric layer may be on the substrate and enclose the sidewalls of the second trace. A trace channel may be in the dielectric layer directly above the first trace, with the second trace in the trace channel. The second trace may be identical to the first trace its sidewalls may be perpendicular to the top surface and the bottom surface.

Claims (50)

1. A device comprising:

a stacked trace comprising:

a first trace that comprises a first seed layer and a first metal layer in a substrate;

a second trace that is stacked on the first trace and comprises:

a second seed layer and a second metal layer;

a top surface;

a bottom surface opposite the top surface; and

sidewalls extending between the top surface and the bottom surface and wholly within a width of the first trace laterally; and

a dielectric layer on the substrate and enclosing the sidewalls of the second trace.

2. The device of claim 1 , comprising a trace channel in the dielectric layer directly above the first trace, with the second trace in the trace channel.

3. The device of claim 1 , wherein the second trace is identical to the first trace.

4. The device at claim 1 , wherein the sidewalls are perpendicular to the top surface and the bottom surface of the second trace.

5. The device of claim 1 , wherein the sidewalls taper between the top surface and the bottom surface of the second trace.

6. The device of claim 1 , wherein the stacked trace is coupled to a ground plane.

7. The device of claim 1 , wherein the stacked trace forms a shielded compartment.

8. The device of claim 7 , comprising an electronic component located within the shielded compartment.

9. The device of claim 7 , comprising a signal trace structure located within the shielded compartment.

10. The device of claim 1 , wherein the dielectric layer comprises mold compound.

11. The device of claim 1 , wherein no portion of the first trace is above any portion of the second trace.

12. The device of claim 1 , wherein the second seed layer is U-shaped.

13. The device of claim 1 , wherein the first trace and second trace are formed from an identical metal.

14. The device of claim 1 , wherein the first trace and the second trace run in parallel along their entire respective longitudinal lengths.

15. A device comprising:

a signal trace; and

a stacked trace comprising:

a first trace in a dielectric layer;

a second trace that is stacked on the first trace and comprises:

a cross-section that is within a width of the first trace laterally;

a top surface;

a bottom surface opposite the top surface; and

sidewalls extending between the top surface and the bottom surface;

wherein:

no portion of the first trace is above any portion of the second trace; and

the stacked trace is grounded and surrounds the signal trace.

16. The device of claim 15 , wherein the stacked trace is coupled to a ground plane.

17. The device of claim 16 , wherein the signal trace is shielded from electromagnetic radiation in a lateral direction by the stacked trace and shielded in a vertical direction by the ground plane.

18. The device of claim 15 , wherein a second dielectric layer is on the dielectric layer and encloses the sidewalls of the second trace.

19. The device of claim 15 , wherein the first trace comprises a seed layer and a metal layer formed on the dielectric layer.

20. The device of claim 19 , wherein the second trace comprises a second seed layer and a second metal layer formed on the metal layer.

21. The device of claim 15 , wherein the first trace and second trace are formed from an identical metal.

22. The device of claim 15 , wherein the first trace and the second trace run in parallel along their entire respective longitudinal lengths.

23. A method comprising:

providing, on a substrate, a first dielectric layer;

forming a first trace that comprises a first seed layer and a first metal layer and is on the first dielectric layer;

stacking a second trace on the first trace, where the second trace comprises:

a second seed layer and a second metal layer within a width of the first trace laterally;

a top surface;

a bottom surface opposite the top surface; and

sidewalls extending between the top surface and the bottom surface; and

forming a second dielectric layer enclosing sides of the second trace, the second dielectric layer in contact with the first dielectric layer, wherein no portion of the first trace is above any portion of the second trace.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2016
From: HINER, DAVID JON; HUEMOELLER, RONALD PATRICK; MCCALEB, HARRY DONALD, III; DEVITA, MICHAEL HARRY, JR.
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 037434/0053 →
Cited By (1)
US 12,519,046