IP Library Granted Patent US 9,905,536
Granted Patent B2
US 9,905,536 · App. 14/994,963 · Granted Feb 27, 2018

Semiconductor device

Inventor: Makoto Moda (Oita, JP)
Assignee: J-DEVICES CORPORATION
H01L25/0657H01L23/36H01L23/49861H01L24/48H01L24/73H01L24/83H01L29/0657H01L24/29H01L24/32H01L24/33H01L24/49H01L2224/26145H01L2224/2919H01L2224/2939H01L2224/29294H01L2224/29339H01L2224/32145H01L2224/32225H01L2224/33181H01L2224/45144H01L2224/45147H01L2224/48227H01L2224/49113H01L2224/49173H01L2224/73215H01L2224/73265H01L2224/83101H01L2224/83365H01L2225/06555H01L2225/06589H01L2924/10158
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Quick Facts
Patent No.
US 9,905,536
App. No.
14/994,963
Granted
Feb 27, 2018
Kind
B2
Abstract

A semiconductor device is provided including a package substrate, and a plurality of semiconductor chips stacked above the package substrate, at least one of the plurality of semiconductor chips including a step part in a periphery edge part of a rear surface.

Claims (14)

1. A semiconductor device comprising:

a package substrate; and

a plurality of semiconductor chips stacked above the package substrate, the plurality of semiconductor chips including a first semiconductor chip arranged on an upper layer among the plurality of semiconductor chips and second semiconductor chip arranged on a lower layer among the plurality of semiconductor chips,

wherein the first semiconductor chip includes a step part with a step difference in the step shape in a periphery edge part of a rear surface,

the step part exposes an electrical connection terminal of the second semiconductor chip,

the electrical connection terminal of the second semiconductor chip is arranged between adjacent electrical connection terminals of the first semiconductor chip in a top view toward the package substrate, and

a rear surface except the step part of the first semiconductor chip being adhered by an adhesive.

2. The semiconductor device according to claim 1 , wherein the step part is arranged in one part of a periphery edge part of the first semiconductor chip.

3. The semiconductor device according to claim 2 , wherein at least one of the plurality of semiconductor chips includes a plurality of grooves on a rear surface, and is connected with a lower layer via the adhesive.

4. The semiconductor device according to claim 2 , wherein the step part is arranged in one side of the periphery edge part of the first semiconductor chip.

5. The semiconductor device according to claim 2 , wherein the step part is arranged in each side of the periphery edge part of the first semiconductor chip.

6. The semiconductor device according to claim 2 , wherein the surface of the step parts has electrical conductivity.

7. The semiconductor device according to claim 1 , wherein each of the centers of the plurality of semiconductor chips roughly match and are arranged within a region having a radius within 0.005 mm.

8. The semiconductor device according to claim 7 , wherein the adhesive is a die attachment paste.

Assignments (2)
CHANGE OF NAME Recorded Jul 17, 2020
From: J-DEVICES CORPORATION
To: AMKOR TECHNOLOGY JAPAN, INC.
Reel/Frame 053242/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2016
From: MODA, MAKOTO
To: J-DEVICES CORPORATION
Reel/Frame 037481/0938 →
Priority Claims (1)
JP 2015-012379 · Jan 26, 2015 · national
Continuity (1)
Related Publication 20160218086A1 · Jul 28, 2016