SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
A selectively shielded and/or three-dimensional semiconductor device and a method of manufacturing thereof. For example and without limitation, various aspects of this disclosure provide a semiconductor device that comprises a composite plate for selective shielding and/or a three-dimensional embedded component configuration.
1 . A semiconductor device comprising:
a composite plate comprising a metal pattern and a dielectric layer;
a semiconductor die comprising:
a front die surface comprising a contact pad;
a back die surface coupled to the composite plate; and
a plurality of side die surfaces extending between the front die surface and the back die surface;
an insulation layer covering the front die surface, the side die surfaces, and the composite plate;
a conductive via extending between a first surface of the insulation layer and the contact pad;
a conductive layer on the first surface of the insulation layer; and
a package interconnection structure on the conductive layer and electrically connected to the conductive via.
2 . The semiconductor device of claim 1 , comprising a dielectric layer between the insulation layer and the composite plate.
3 . The semiconductor device of claim 1 , wherein the insulation layer comprises a prepreg material.
4 . The semiconductor device of claim 1 , wherein the composite plate comprises:
a first area through which the composite plate blocks electromagnetic waves;
and a second area through which the composite plate passes electromagnetic waves;
5 . The semiconductor device of claim 4 , wherein the conductive layer comprises an antenna.
6 . The semiconductor device of claim 5 , wherein the antenna is positioned over the second area of the composite plate.
7 . The semiconductor device of claim 1 , wherein the:
the metal pattern comprises a first metal pattern surface and a second metal pattern surface opposite the first metal pattern surface;
the dielectric layer comprises a first dielectric layer surface and a second dielectric layer surface opposite the first dielectric layer surface;
the composite plate comprises a first composite plate surface comprising the first metal pattern surface and the second dielectric layer surface; and
the composite plate comprises a second composite plate surface opposite the first composite plate surface and comprising the second metal pattern surface and the second dielectric layer surface.
8 . The semiconductor device of claim 1 , comprising a second conductive via extending between the first surface of the insulation layer and the metal pattern, and electrically connected to the conductive layer and the metal pattern.
9 . The semiconductor device of claim 8 , comprising a second package interconnection structure on the conductive layer and electrically connected to the metal pattern through at least the second conductive via.
10 . A semiconductor device comprising:
a composite plate comprising:
a metal pattern comprising an electromagnetic shield;
a dielectric layer;
a first area through which the metal pattern of the composite plate blocks electromagnetic waves; and
a second area through which the composite plate passes electromagnetic waves;
a semiconductor die coupled to the composite plate and comprising a contact pad;
an insulation layer covering the semiconductor die;
a conductive via extending between a first surface of the insulation layer and the contact pad; and
a conductive layer on the first surface of the insulation layer, wherein the conductive layer comprises an antenna that is positioned over the second area of the composite plate.
11 . The semiconductor device of claim 10 , comprising a dielectric layer between the insulation layer and the composite plate.
12 . The semiconductor device of claim 10 , wherein the semiconductor die is positioned at least partially over the first area of the composite plate.
13 . The semiconductor device of claim 10 , wherein the:
the metal pattern comprises a first metal pattern surface and a second metal pattern surface opposite the first metal pattern surface;
the dielectric layer comprises a first dielectric layer surface and a second dielectric layer surface opposite the first dielectric layer surface;
the composite plate comprises a first composite plate surface comprising the first metal pattern surface and the second dielectric layer surface; and
the composite plate comprises a second composite plate surface opposite the first composite plate surface and comprising the second metal pattern surface and the second dielectric layer surface.
14 . The semiconductor device of claim 10 , comprising a second conductive via extending between the conductive layer and the metal pattern, and electrically connected to the conductive layer and the metal pattern.
15 . A semiconductor device comprising:
a first conductive layer comprising:
an upper conductive layer side;
a lower conductive layer side; and
a lateral conductive layer side extending between the upper conductive layer side and the lower conductive layer side;
a semiconductor die comprising:
a front die surface comprising a contact pad;
a back die surface coupled to the upper conductive layer side; and
a plurality of side die surfaces extending between the front die surface and the back die surface;
an insulation layer covering the front die surface, the side die surfaces, the upper conductive layer side, and the lateral conductive layer side;
a second conductive layer on a top surface of the insulation layer; and
a conductive via extending through the insulation layer between the second conductive layer and the contact pad.
16 . The semiconductor device of claim 15 , comprising an electronic component connected to the second conductive layer at a location directly above the semiconductor die.
17 . The semiconductor device of claim 16 , wherein the semiconductor die is electrically connected to the first conductive layer through the electronic component and the second conductive layer.
18 . The semiconductor device of claim 16 , comprising an encapsulating material that covers the electronic component and the second conductive layer.
19 . The semiconductor device of claim 18 , comprising a dielectric layer between the second conductive layer and the electronic component, wherein:
the electronic component is connected to the second conductive layer through a via hole in the dielectric layer; and
the encapsulating material covers the dielectric layer.
20 . The semiconductor device of claim 15 , wherein the insulation layer comprises a prepreg material.