IP Library Granted Patent US 9,793,826
Granted Patent B2
US 9,793,826 · App. 15/003,958 · Granted Oct 17, 2017

Method of manufacturing a circuit device

Inventors: Shigeaki Mashimo (Maebashi, JP); Fumio Horiuchi (Ashikaga, JP); Kiyoaki Kudo (Gunma, JP); Akira Sakurai (Tatebayashi, JP); Yuhki Inagaki (Kumagaya, JP)
Assignee: Semiconductor Components Industries, LLC
H02M7/537H01L21/4825H01L21/56H01L21/565H01L23/293H01L23/3121H01L23/4334H01L23/49531H01L23/49541H01L23/49575H01L24/85H01L25/072H01L25/18H01L25/50H05K1/0203H05K1/181H01L24/45H01L24/48H01L2224/32245H01L2224/45015H01L2224/45124H01L2224/48091H01L2224/48106H01L2224/48137H01L2224/48139H01L2224/48247H01L2224/48472H01L2224/73265H01L2924/1203H01L2924/13055H01L2924/13091H01L2924/14H01L2924/181H01L2924/19105H01L2924/19107Y10T29/4916
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Quick Facts
Patent No.
US 9,793,826
App. No.
15/003,958
Granted
Oct 17, 2017
Kind
B2
Abstract

In one form, a method of manufacturing a circuit device comprises providing a lead frame comprising a plurality of leads, each comprising an island portion, a bonding portion elevated from the island portion, a slope portion extending obliquely so as to connect the island portion and the bonding portion, and a lead portion extending from the bonding portion. The circuit elements are mounted on upper surfaces of the island portions, and are connected to corresponding bonding portions by wirings. Two leads are adapted to be connected to positive and negative sides of a power source, and another lead is an output lead for providing alternating-current power. Lower surfaces of the island portions are attached to an upper surface of a circuit board. The circuit board, the circuit elements, and the lead frame are encapsulated by a resin, so that the lead portions are not covered by the resin.

Claims (28)

1. A method of manufacturing a circuit device, comprising:

providing a lead frame comprising a plurality of leads, each of the leads comprising an island portion, a bonding portion elevated from the island portion, a slope portion extending obliquely so as to connect the island portion and the bonding portion, and a lead portion extending from the bonding portion,

mounting circuit elements on upper surfaces of the island portions;

connecting the circuit elements to corresponding bonding portions by wirings wherein one of the plurality of leads is a first input lead, another of the plurality of leads is a second input lead, and yet another of the plurality of leads is an output lead for outputting alternating-current power obtained by converting direct-current power inputted through the first input lead and the second input lead;

attaching lower surfaces of the island portions to an upper surface of a circuit board;

encapsulating by a resin the circuit board, the circuit elements and the lead frame so that the lead portions are not covered by the resin;

connecting the first input lead to a positive electrode of a direct-current power source; and

connecting the second input lead to a negative electrode side of the direct-current power source.

2. The method of claim 1 , wherein a first circuit element of the circuit elements mounted on an island portion of a first lead of the leads and a bonding portion of a second lead of the leads are electrically connected through a first wiring.

3. The method of claim 2 , wherein there is no other lead between the first lead and the second lead.

4. The method of claim 2 , wherein there is a third lead between the first lead and the second lead, and the first wiring passes above the third lead.

5. The method of claim 1 , wherein mounting circuit elements on upper surfaces of the island portions comprises:

mounting a diode on an upper surface of the island portion of a first lead; and

mounting a transistor on the upper surface of the island portion of the first lead.

6. The method of claim 5 , wherein mounting the transistor on the upper surface of the island portion of the first lead further comprises:

mounting an insulated gate bipolar transistor on the upper surface of the island portion of the first lead.

7. The method of claim 6 , further comprising:

mounting an insulative control board on the upper surface of the circuit board; and

mounting a control element on an upper surface of the insulative control board.

8. The method of claim 7 , further comprising:

connecting the control element to at least one of the circuit elements through at least one wiring.

9. The method of claim 8 , wherein connecting the control element to the at least one of the circuit elements through the at least one wiring comprises:

connecting the control element to the transistor through the at least one wiring.

10. The method of claim 1 , further comprising:

mounting an insulative control board on the upper surface of the circuit board; and

mounting a control element on an upper surface of the insulative control board.

11. The method of claim 10 , further comprising:

connecting the control element to at least one of the circuit elements through at least one wiring.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2016
From: MASHIMO, SHIGEAKI; HORIUCHI, FUMIO; KUDO, KIYOAKI; SAKURAI, AKIRA; INAGAKI, YUHKI
To: ON SEMICONDUCTOR TRADING, LTD.
Reel/Frame 037634/0644 →
CHANGE OF NAME Recorded Feb 1, 2016
From: ON SEMICONDUCTOR TRADING LTD.
To: ON SEMICONDUCTOR TRADING SARL
Reel/Frame 037676/0682 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2016
From: ON SEMICONDUCTOR TRADING SARL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 037676/0753 →
Priority Claims (1)
JP 2010-213694 · Sep 24, 2010 · national
Continuity (2)
Division 13242202 · Sep 23, 2011
Related Publication 20160211247A1 · Jul 21, 2016