Method for manufacturing multilayer wiring substrate
The present invention is a method for manufacturing a multilayer wiring board having (1) a step of providing with a hole for a via hole, an overhang of a metal foil formed at an opening of the hole, and lower space formed between the overhang and an inside wall of the hole, by using a conformal method or a direct laser method; and (2) a step of filling in the hole by forming electrolytic filling plating layers within the hole and on the metal foil, wherein the filling-in of the hole by the formation of electrolytic filling plating layers in the step (2) is carried out by temporarily decreasing the electric current density of electrolytic filling plating in the middle of the electrolytic filling plating, and increasing it again.
1. A method for manufacturing a multilayer wiring board, comprising:
(1) a step of integrally laminating an inner layer material with an inner layer wiring pattern formed thereon, an insulating layer, and a metal foil for an upper layer wiring pattern, and forming a hole for a via hole in the metal foil and the insulating layer, the hole being formed from the metal foil to the inner layer wiring pattern, an overhang of the metal foil being formed at an opening of the hole and a lower space being formed between the overhang and an inside wall of the hole;
(2) a step of forming a base electroless plating layer within the hole and on the metal foil, then filling in the hole by forming electrolytic filling plating material, and thus forming a via hole that connects the metal foil and the inner layer wiring pattern; and
(3) a step of forming an upper layer wiring pattern on the insulating layer after the formation of the electrolytic filling plating material,
wherein the filling-in of the hole by the formation of the electrolytic filling plating material in step (2) is carried out by temporarily decreasing an electric current density and then increasing the electric current density while performing electrolytic filling plating, and
wherein temporarily decreasing the electric current density occurs when the electrolytic filling plating material fills the lower space between the overhang of the metal foil and the inside wall of the hole, and a thickness of an electrolytic filling plating material deposited on a bottom face of the hole is equal to or smaller than a thickness of the electrolytic filling plating material deposited on the inside wall of the hole and on the metal foil.
2. The method for manufacturing a multilayer wiring board according to claim 1 , wherein an aspect ratio of a depth of the hole to an opening size of the hole after performing the electrolytic filling plating is equal to or greater than an aspect ratio of a depth of the hole to an opening size of the hole before performing the electrolytic filling plating.
3. The method for manufacturing a multilayer wiring board according to claim 1 ,
wherein temporarily decreasing the electric current density occurs before a plating void is formed.
4. The method for manufacturing a multilayer wiring board according to claim 1 , wherein the temporary decrease of electric current density is 50% or more.
5. The method for manufacturing a multilayer wiring board according to claim 1 , wherein after increasing the electric current density, the electric current density is equal to or larger than the electric current density before temporarily decreasing the electric current density.
6. The method for manufacturing a multilayer wiring board according to claim 1 , wherein the hole is formed by a conformal method or a direct laser method.
7. The method for manufacturing a multilayer wiring board according to claim 1 , wherein a streak appears between a layer of the electrolytic filling plating material formed before temporarily decreasing the electric current density and a layer of the electrolytic filling plating material formed after temporarily decreasing the electric current density.