IP Library Granted Patent US 9,924,118
Granted Patent B2
US 9,924,118 · App. 15/033,964 · Granted Mar 20, 2018

Silicon-based image sensor with improved reading dynamic range

Inventor: Stéphane Gesset (Saint-Laurent-du-Pont, FR)
Assignee: E2V SEMICONDUCTORS
H04N5/3559H04N5/243H04N5/355H04N5/378H04N5/3745
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Quick Facts
Patent No.
US 9,924,118
App. No.
15/033,964
Granted
Mar 20, 2018
Kind
B2
Abstract

In an image sensor, the effective capacitance of the storage node NS of the pixel, which stores the charges (the electrons) collected by the photosensitive element of the pixel, is modified with the aid of a feedback loop 100 which influences the supply V REFP of the follower transistor T 3 connected to the storage node, in such a way that the apparent capacitance of the storage node depends on the gain G L of the loop. By modifying the gain, the capacitance of the storage node and therefore the charge/voltage conversion factor, which is inversely proportional to this capacitance, is modified.

Claims (42)

1. An image sensor with active pixels, comprising pixels and reading circuits, each pixel having

at least one photosensitive element,

a storage node for storage of charges generated by the photosensitive element of the pixel, and

a follower transistor having

a gate connected to the storage node,

a source connected to a column conductor, the column conductor being connected to a reading circuit, and

a drain configured to receive a supply voltage,

wherein

a feedback loop is provided, said feedback loop having an input connected to the column conductor and an output connected to the drain of the follower transistor in order to provide the supply voltage to the drain, and

a behaviour of the feedback loop being modified as a function of an illumination received by the image sensor.

2. The sensor of claim 1 , wherein said behaviour is modified by enabling or disabling the feedback loop as a function of the illumination received by the image sensor.

3. The sensor of claim 1 , wherein said behaviour is modified by modifying a gain of the feedback loop as a function of the illumination received by the image sensor.

4. The sensor of claim 3 , wherein said gain is modified between a positive value and a negative value.

5. The sensor of claim 1 , wherein said received illumination, which is used to modify the behaviour of the feedback loop, is an overall illumination received by the sensor.

6. The sensor of claim 1 , wherein the received illumination, which is used to modify the behaviour of the feedback loop, is an illumination received by a pixel being read.

7. The sensor of claim 6 , wherein

when the charges of the storage node of a pixel are read, the follower transistor of the pixel applies a corresponding voltage to the column conductor of the pixel, which represents an illumination received by the pixel, and the behaviour of the feedback loop is modified as a function of said voltage present on the column conductor.

8. The sensor of claim 1 , each pixel further comprising a transfer transistor for transferring charges collected by the photosensitive element of the pixel to the storage node during a charge transfer phase after a phase of initialising the storage node,

wherein the feedback loop is disabled during the phase of initialising the storage node.

9. The sensor of claim 1 , wherein the feedback loop comprises:

a first amplifier with a negative gain,

a second amplifier with a negative gain, and

a comparator,

wherein

a first input of the first amplifier is connected to the column conductor,

an output of the first amplifier is connected at a first input of the second amplifier, and

the comparator is configured to

receive the output of the first amplifier and an output of the second amplifier, and

provide a control signal for routing either the output of the first amplifier or the output of the second amplifier to the drain of the follower transistor.

10. The sensor of claim 9 , wherein:

the first amplifier has

an input capacitor,

the first input connected to the column conductor by the input capacitor of the first amplifier, and

a second input connected to a first reference voltage,

a feedback capacitor, and

a switch for short-circuiting the feedback capacitor of the first amplifier during a phase of initialising the storage node; and

the second amplifier has

an input capacitor,

the first input connected to the column conductor by the input capacitor of the second amplifier,

a second input connected to a second reference voltage,

a feedback capacitor, and

a switch for short-circuiting the feedback capacitor of the second amplifier during a phase of initialising the storage node.

Assignments (2)
CHANGE OF NAME Recorded Mar 2, 2018
From: E2V SEMICONDUCTORS
To: TELEDYNE E2V SEMICONDUCTORS SAS
Reel/Frame 045651/0012 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2016
From: GESSET, STÉPHANE
To: E2V SEMICONDUCTORS
Reel/Frame 038443/0724 →
Priority Claims (1)
FR 13 60769 · Nov 4, 2013 · national
Continuity (1)
Related Publication 20160277689A1 · Sep 22, 2016