IP Library Granted Patent US 9,698,220
Granted Patent B2
US 9,698,220 · App. 15/036,987 · Granted Jul 4, 2017

Semiconductor device

Inventor: Noriyuki Hirakata (Osaka, JP)
Assignee: Sumitomo Electric Industries, Ltd.
H01L29/0696H01L21/046H01L21/0485H01L29/045H01L29/1095H01L29/1608H01L29/41741H01L29/45H01L29/66068H01L29/7395H01L29/7802
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Quick Facts
Patent No.
US 9,698,220
App. No.
15/036,987
Granted
Jul 4, 2017
Kind
B2
Abstract

A MOSFET includes: a SiC layer including one main surface and provided with a plurality of contact regions; and a plurality of source electrodes formed in contact with the contact regions. In the MOSFET, in a plan view of the one main surface, a plurality of cells including the contact regions and the source electrodes are formed adjacent to one another, each of the plurality of cells having an outer circumferential shape that is a shape of hexagon including a long axis. According to the MOSFET, a contact resistance between each contact region and each source electrode can be further reduced, thereby attaining a more improved electrical property.

Claims (15)

1. A semiconductor device comprising:

a semiconductor layer including one main surface and provided with a plurality of contact regions; and

a plurality of electrode layers formed in contact with the contact regions,

in a plan view of the one main surface, a plurality of cells including the contact regions and the electrode layers being formed adjacent to one another, each of the plurality of cells having an outer circumferential shape that is a shape of hexagon including a long axis,

wherein the outer circumferential shape is the shape of hexagon constituted of a pair of long sides and short sides, the pair of long sides extending along each other in a direction of the long axis, the short sides connecting the pair of long sides to each other.

2. The semiconductor device according to claim 1 , wherein a ratio of a length of each of the long sides to a length of each of the short sides is not less than 1.2 and not more than 20.

3. The semiconductor device according to claim 1 , wherein the semiconductor layer is composed of a wide band gap semiconductor.

4. The semiconductor device according to claim 1 , wherein

the semiconductor layer is composed of silicon carbide,

the semiconductor layer is further provided with source regions and body regions, the source regions surrounding the respective contact regions in the plan view of the one main surface and each having an outer circumferential shape that is geometrically similar to the shape of hexagon, the body regions surrounding the respective source regions in the plan view of the one main surface and each having an outer circumferential shape that is geometrically similar to the shape of hexagon,

the cells further include the source regions and the body regions, and

sides constituting the shape of hexagon constituting the outer circumferential shape of each of the body regions, and sides constituting the shape of hexagon constituting the outer circumferential shape of each of the source regions extend in a direction along a <1-100> direction of the silicon carbide.

5. The semiconductor device according to claim 4 , wherein

the electrode layers are formed in contact with the contact regions and the source regions, and

each of the electrode layers is composed of at least one material selected from a group consisting of nickel silicon and titanium aluminum silicon.

Assignments (2)
NUNC PRO TUNC ASSIGNMENT Recorded Jul 1, 2026
From: SUMITOMO ELECTRIC INDUSTRIES, LTD.
To: MITSUMI ELECTRIC CO., LTD.
Reel/Frame 075871/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2016
From: HIRAKATA, NORIYUKI
To: SUMITOMO ELECTRIC INDUSTRIES, LTD.
Reel/Frame 038606/0721 →
Priority Claims (1)
JP 2013-238960 · Nov 19, 2013 · national
Continuity (1)
Related Publication 20160308003A1 · Oct 20, 2016