Semiconductor device, a micro-electro-mechanical resonator and a method for manufacturing a semiconductor device

1. A semiconductor device comprising:

a silicon substrate layer with a decoupling region, wherein the decoupling region of the silicon substrate layer comprises an array of lamellas laterally spaced apart from each other by cavities, wherein each lamella of the array of lamellas comprises at least 80% silicon dioxide.

2. The semiconductor device according to claim 1 , wherein a lamella of the array of lamellas comprises a lateral length between 200 nm and 10 μm, a lateral thickness between 20 nm and 500 nm and a vertical depth between 500 nm and 100 μm.

3. The semiconductor device according to claim 1 , wherein a cavity laterally separating two neighboring lamellas comprises a lateral width between 50 nm and 1 μm.

4. The semiconductor device according to claim 1 , wherein the array of lamellas comprises rows of lamellas, wherein two neighboring rows of lamellas comprise a lateral offset.

5. The semiconductor device according to claim 1 , wherein the array of lamellas comprises a lateral honeycomb structure.

6. The semiconductor device according to claim 1 , wherein the cavities laterally separating the lamellas of the array of lamellas are sealed by a silicon oxide layer or a carbon layer at an end opposite to a bulk silicon of the semiconductor device.

7. The semiconductor device according to claim 1 , wherein the cavities laterally separating the lamellas of the array of lamellas are connected to a common lateral cavity at an end facing a bulk silicon of the semiconductor device.

8. The semiconductor device according to claim 1 , wherein the array of lamellas is arranged above a common lateral cavity, wherein the array of lamellas comprises solely lateral connections to the surrounding silicon substrate layer.

9. The semiconductor device according to claim 1 , wherein the semiconductor device comprises an electrically conductive structure arranged above the array of lamellas so that the capacitive coupling of the electrically conductive structure and a bulk silicon of the semiconductor device below the array of lamellas is weaker than without the array of lamellas in between.

10. The semiconductor device according to claim 1 , comprising a resonator structure, wherein the resonator structure comprises at least one resonator area and at least one anchor area, wherein the resonator area is arranged next to an electrode for stimulating an oscillation of the resonator structure, wherein the array of lamellas comprises at least one row of lamellas connecting the anchor area laterally to the silicon substrate layer.

11. The semiconductor device according to claim 10 , wherein the resonator structure and the array of lamellas is arranged above a common lateral cavity so that the resonator structure is connected to neighboring silicon solely by the array of lamellas connected to the anchor region.

12. The semiconductor device according to claim 10 , wherein the array of lamellas connected to the anchor region comprises a p-n junction within the lamellas between the anchor region and the silicon substrate layer.

13. The semiconductor device according to claim 10 , wherein the decoupling region comprises at least a further array of lamellas laterally arranged between the at least one resonator area and the silicon substrate layer, wherein the lamellas of the further array of lamellas are connected to the silicon substrate layer and extend laterally towards the resonator area without reaching the resonator area.

14. Method for manufacturing a semiconductor device, the method comprising:

manufacturing an array of lamellas laterally spaced apart from each other by trenches within a decoupling region of a silicon substrate layer; and

oxidizing the array of lamellas so that each lamella of the array of lamellas comprises at least 80% silicon dioxide.

15. Method according to claim 14 , further comprising manufacturing a common lateral cavity within the silicon substrate layer before the manufacturing of the array of lamellas, wherein the array of lamellas is manufactured so that the trenches reach the common lateral cavity.

16. Method according to claim 14 , further comprising sealing the trenches at an end opposite to a bulk silicon of the semiconductor device by an oxide layer or a carbon layer.