Method, apparatus and system for improved nanowire/nanosheet spacers
A semiconductor structure, comprising a semiconductor substrate; at least one fin, wherein the at least one fin comprises one or more first layers and one or more second layers, wherein the first layers and the second layers are interspersed and the first layers laterally extend further than the second layers; a dummy gate structure comprising a first spacer material disposed on sidewalls of the dummy gate; a second spacer material disposed adjacent to each of the second layers, wherein sidewalls of the fin comprise exposed portions of each of the first layers and the second spacer material, and an epitaxial source/drain material disposed on at least the exposed portions of each of the first layers. Methods and systems for forming the semiconductor structure.
1. A method, comprising:
providing a semiconductor structure comprising a semiconductor substrate; at least one fin comprising one or more first layers and one or more second layers, wherein the first layers and the second layers are interspersed and each of the second layers is more susceptible to oxidation than any of the first layers; and a dummy gate structure comprising a first spacer material disposed on sidewalls of the dummy gate;
selectively oxidizing two portions of each of the second layers, wherein the two portions are exposed on the sidewalls of the fin;
selectively stripping the two portions of each of the second layers, to yield a plurality of second layer recesses;
depositing a second spacer material on at least the sidewalls of the fin, wherein the second spacer material fills the plurality of second layer recesses; and
epitaxially growing a source/drain material from at least portions of each of the first layers exposed on the sidewalls of the fin.
2. The method of claim 1 , wherein the first material is silicon and the second material is silicon/germanium (SiGe).
3. The method of claim 1 , wherein the first spacer material comprises a low-k dielectric material.
4. The method of claim 1 , wherein the second spacer material differs from the first spacer material.
5. The method of claim 1 , further comprising etching back the second spacer material from at least the portions of the first layers exposed on the sidewalls of the fin.
6. The method of claim 1 , wherein epitaxially growing the source/drain material further comprises growing the source/drain material from the semiconductor substrate.
7. The method of claim 1 , further comprising replacing each of the second layers with a gate.
8. A method, comprising:
providing a semiconductor structure comprising a semiconductor substrate; at least one fin comprising one or more first layers and one or more second layers, wherein the first layers and the second layers are interspersed and each of the second layers is more susceptible to oxidation than the first layers, each of said first and second layers each being exposed on sidewalls of the fin; and a dummy gate structure comprising a first spacer material disposed on sidewalls of the dummy gate;
selectively oxidizing two portions of each of the second layers, wherein the two portions are on the exposed sidewalls of the fin;
selectively stripping the two portions of each of the second layers, to yield a plurality of second layer recesses;
depositing a second spacer material within at least the plurality of second layer recesses; and
epitaxially growing a source/drain material from at least portions of each of the first layers exposed on the sidewalls of the fin.
9. The method of claim 8 , wherein the first material is silicon and the second material is silicon/germanium (SiGe).
10. The method of claim 8 , wherein the first spacer material comprises a low-k dielectric material.
11. The method of claim 8 , wherein the second spacer material differs from the first spacer material.
12. The method of claim 8 , wherein epitaxially growing the source/drain material further comprises growing the source/drain material from the semiconductor substrate.
13. The method of claim 8 , further comprising replacing each of the second layers with a gate.
14. The method of claim 8 , wherein selectively oxidizing two portions of each of the second layers further comprises oxidizing only a portion of the second layer adjacent the exposed sidewalls of the fin.
15. The method of claim 8 further comprising stripping the first spacer material disposed on the sidewalls of the dummy gate, and wherein depositing the second spacer material further comprising depositing the second spacer material on the sidewalls of the dummy gate.
16. The method of claim 8 , wherein depositing a second spacer material within at least the plurality of second layer recesses further comprises:
depositing the second spacer material on at least the sidewalls of the fin, wherein the second spacer material fills the plurality of second layer recesses; and
etching back the second spacer material to expose the first layers on the sidewalls of the fin.
17. A method, comprising:
providing a semiconductor structure comprising a semiconductor substrate; at least one fin comprising one or more first layers and one or more second layers, wherein the first layers and the second layers are interspersed and each of the second layers is more susceptible to oxidation than the first layers, each of said first and second layers each being exposed on sidewalls of the fin; and a dummy gate structure comprising a first spacer material disposed on sidewalls of the dummy gate;
selectively oxidizing two portions of each of the second layers, wherein the two portions are on the exposed sidewalls of the fin;
selectively stripping the two portions of each of the second layers, to yield a plurality of second layer recesses;
depositing a second spacer material on at least the sidewalls of the fin, wherein the second spacer material fills the plurality of second layer recesses;
etching back the second spacer material to expose the first layers on the sidewalls of the fin; and
epitaxially growing a source/drain material from at least portions of each of the first layers exposed on the sidewalls of the fin.
18. The method of claim 17 , wherein the first material is silicon and the second material is silicon/germanium (SiGe).
19. The method of claim 17 , wherein the first spacer material comprises a low-k dielectric material.
20. The method of claim 17 , wherein selectively oxidizing two portions of each of the second layers further comprises oxidizing only a portion of the second layer adjacent the exposed sidewalls of the fin.