IP Library Granted Patent US 10,282,102
Granted Patent B2
US 10,282,102 · App. 15/131,447 · Granted May 7, 2019

Host controlled enablement of automatic background operations in a memory device

Inventors: Francesco Falanga (Pozzuoli, IT); Danilo Caraccio (Buonalbergo, IT)
Assignee: Micron Technology, Inc.
G06F3/061G06F3/0619G06F3/0659G06F3/0665G06F3/0689G06F12/0246G06F2212/7211
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Quick Facts
Patent No.
US 10,282,102
App. No.
15/131,447
Granted
May 7, 2019
Kind
B2
Abstract

A host that is coupled to a memory device is configured to read a status register of the memory device to determine if the memory device supports host controlled enablement of automatic background operations. The memory device responds to the host regarding whether the memory device supports host controlled enablement of automatic background operations. The host can enable the automatic background operations if the memory device supports this feature. The host can then set a time period in the memory device that is indicative of when the memory device can automatically perform the background operations.

Claims (20)

1. A method for host controlled enablement of an automatic background operation, the method comprising:

the host reading a status register of the memory device to determine if the memory device supports host controlled enablement of the automatic background operation;

the host enabling the automatic background operation responsive to determining the memory device supports host controlled enablement of the automatic background operation; and

the host setting a time period in the memory device, wherein the time period is indicative of when the memory device can automatically perform the background operation;

wherein the time period begins to run after a last commanded operation by the host is completed.

2. The method of claim 1 , further comprising the host receiving an acknowledgment that the automatic background operation has been enabled.

3. The method of claim 1 , further comprising the host receiving an acknowledgment that the time period has been set.

4. The method of claim 1 , wherein the background operation is automatically performed by the memory device after the time period has expired.

5. The method of claim 4 , wherein performance of the background operation is halted responsive to receiving a command from the host.

6. A memory device comprising:

an array of memory cells;

a register configured to store control data indicative of enablement of an automatic background operation; and

a controller coupled to the register and the array of memory cells, the controller configured to enable the automatic background operation responsive to the control data;

wherein the register comprises:

a status register configured to store data indicative of whether the memory device supports host controlled enablement of the automatic background operation; and

an enablement register configured to store data indicative of whether the automatic background operation is enabled.

7. The memory device of claim 6 , wherein the register is part of the controller.

8. The memory device of claim 6 , wherein the register is separate from the controller.

9. The memory device of claim 6 , further comprising a time register configured to store a time period value indicative of a time period, wherein the controller is configured to automatically perform the background operation responsive to the time period expiring after completion of a last host commanded operation.

10. The memory device of claim 9 , wherein the time register configured to store the time period value in a first time register and further comprising a second time register configured to store a unit of measure value associated with the time period value.

Assignments (8)
CONFIRMATORY LICENSE Recorded Oct 23, 2023
From: MICRON TECHNOLOGY, INC.
To: LODESTAR LICENSING GROUP LLC
Reel/Frame 065313/0699 →
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 13739453 · Jan 11, 2013
Related Publication 20160231932A1 · Aug 11, 2016
Cited By (1)
US 12,530,291