IP Library Granted Patent US 10,242,146
Granted Patent B2
US 10,242,146 · App. 15/132,163 · Granted Mar 26, 2019

Method and apparatus for placing and routing partial reconfiguration modules

Inventors: David Samuel Goldman (Silver Spring, MD); Mark Bourgeault (Mississauga, CA); Vaughn Betz (Toronto, CA); Alan Louis Herrmann (Sunnyvale, CA)
Assignee: Altera Corporation
G06F17/5077G06F17/5054G06F17/5072G06F2217/72
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Quick Facts
Patent No.
US 10,242,146
App. No.
15/132,163
Granted
Mar 26, 2019
Kind
B2
Abstract

A method for designing a system on a target device includes assigning resources on the target device to static logic modules and partial reconfigurable (PR) modules in the system. The instances of one of the PR modules are placed and routed in parallel utilizing resources from those that are assigned. Other embodiments are also disclosed.

Claims (46)

1. A method for designing a system on a target device, comprising:

routing a static logic module on the target device;

routing a plurality of instances of a partial reconfiguration (PR) module on the target device in parallel;

determining whether the static logic module and the PR module share resources that are in conflict;

re-routing the static module and the PR module in parallel in response to determining that the static logic module and the PR module share resources that are in conflict in order to resolve the conflict;

generating a data file that describes the routing of the static module and the PR module; and

programming the target device with the data file to physically transform resources on the target device to implement the system, wherein the resources include interconnect for routing.

2. The method of claim 1 , wherein routing the instances of the PR module on the target device comprises selecting routing resources for a first instance of the PR module that are used by a second instance of the PR module over selecting other routing resources.

3. The method of claim 1 , wherein routing the static logic module and the PR module comprises selecting routing resources for the static logic module and the PR module that are unused by other static logic modules and PR modules over selecting routing resources that are used by the other static modules or PR modules.

4. The method of claim 1 , wherein each of the instances of the PR module comprises a different circuit description of the PR module and each of the different circuit descriptions interfaces with a same static logic.

5. The method of claim 1 , wherein the re-routing comprises using a first processing resource to route the static logic module in parallel with using a second processing resource to route an instance of the PR module.

6. The method of claim 1 further comprising:

determining whether the static logic module and the PR module have a placement conflict; and

re-placing the static module and the PR module in parallel in response to determining that the static logic module and the PR module have the placement conflict in order to resolve the placement conflict.

7. The method of claim 1 further comprising:

placing a static logic module on a target device;

placing instances of a PR module on the target device in parallel;

determining whether the static logic module and the PR module have a placement conflict; and

re-placing the static module and the PR module in parallel in response to determining that the static logic module and the PR module have the placement conflict in order to resolve the placement conflict.

8. The method of claim 1 further comprising:

arbitrating routing resources that are in conflict from the routing to static logic modules and PR modules competing for the routing resources; and

assigning unused routing resources from the routing to static logic modules and PR modules having conflicts.

9. The method of claim 8 , wherein the re-routing comprises re-routing the static logic modules and PR modules having conflicts with the routing resources arbitrated and assigned.

10. A non-transitory computer-readable medium including a sequence of instructions stored thereon for causing a computer to execute a method for designing a system on a target device, comprising:

routing a static logic module on the target device;

routing a plurality of instances of a partial reconfiguration (PR) module on the target device in parallel;

determining whether the static logic module and the PR module share resources that are in conflict;

re-routing the static module and the PR module in parallel in response to determining that the static logic module and the PR module share resources that are in conflict in order to resolve the conflict;

generating a program file that describes the routing of the static module and the PR module; and

programming the target device with the program file to physically transform resources on the target device to implement the system, wherein the resources include interconnect for routing.

11. The non-transitory computer readable medium of claim 10 , wherein routing the instances of the PR module on the target device comprises selecting routing resources for a first instance of the PR module that are used by a second instance of the PR module over selecting other routing resources.

12. The non-transitory computer readable medium of claim 10 , wherein routing the static logic module and the PR module comprises selecting routing resources for the static logic module and the PR module that are unused by other static logic modules and PR modules over selecting routing resources that are used by the other static modules or PR modules.

13. The non-transitory computer readable medium of claim 10 , wherein each of the instances of the PR module comprises a different circuit description of the PR module and each of the different circuit descriptions interfaces with a same static logic.

14. The non-transitory computer readable medium of claim 10 , wherein the re-routing comprises using a first processing resource to route the static logic module in parallel with using a second processing resource to route an instance of the PR module.

15. The non-transitory computer readable medium of claim 10 further comprising:

determining whether the static logic module and the PR module have a placement conflict; and

re-placing the static module and the PR module in parallel in response to determining that the static logic module and the PR module have the placement conflict in order to resolve the placement conflict.

16. The non-transitory computer readable medium of claim 10 further comprising:

placing a static logic module on a target device;

placing instances of a PR module on the target device in parallel;

determining whether the static logic module and the PR module have a placement conflict; and

re-placing the static module and the PR module in parallel in response to determining that the static logic module and the PR module have the placement conflict in order to resolve the placement conflict.

17. The non-transitory computer readable medium of claim 10 further comprising:

arbitrating routing resources that are in conflict from the routing to static logic modules and PR modules competing for the routing resources; and

assigning unused routing resources from the routing to static logic modules and PR modules having conflicts.

18. The non-transitory computer readable medium of claim 17 , wherein the re-routing comprises re-routing the static logic modules and PR modules having conflicts with the routing resources arbitrated and assigned.

Assignments (2)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2016
From: GOLDMAN, DAVID SAMUEL; BOURGEAULT, MARK; BETZ, VAUGHN; HERRMANN, ALAN LOUIS
To: ALTERA CORPORATION
Reel/Frame 038310/0169 →
Continuity (3)
Division 14152624 · Jan 10, 2014
Division 13040255 · Mar 3, 2011
Related Publication 20160267212A1 · Sep 15, 2016