IP Library Granted Patent US 9,652,156
Granted Patent B2
US 9,652,156 · App. 15/154,418 · Granted May 16, 2017

Host read command return reordering based on time estimation of flash read command completion

Inventors: Joao Alcantara (Irvine, CA); Zoltan Szubbocsev (Haimhausen, DE)
Assignee: Western Digital Technologies, Inc.
G06F3/061G06F3/0605G06F3/0659G06F3/0679G06F3/0688G06F12/0246G06F2206/1014G06F2212/7205
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Quick Facts
Patent No.
US 9,652,156
App. No.
15/154,418
Granted
May 16, 2017
Kind
B2
Abstract

Managing data returns to a host in response to read commands, an operation monitor of a solid-state drive (SSD) manages counters used to hold metrics that characterize the estimated time to complete a read operation on a corresponding flash die. A timer generates a periodic event which decrements the counters over time. The value stored in each counter is generated for flash operations submitted to the corresponding die and is, generally, based on the operational history and the physical location of the operation. Whenever a read command is scheduled for submission to a particular die, the time estimate for that particular read operation is retrieved and, based on this information, the optimum order in which to return data to the host is determined. This order is used to schedule and program data transfers to the host so that a minimum number of read commands get blocked by other read commands.

Claims (41)

1. A method for managing returns to a host in response to commands received by a solid-state data storage device from said host, the method comprising:

receiving a data read command from said host;

computing a total estimated time to completion of said read command based on an estimated time to completion for each operation submitted to a plurality of non-volatile memory dies corresponding to said read command;

determining, based on said total estimated time to completion of said read command, in what order to return requested data to said host relative to other data read commands received from said host; and

returning said requested data to said host in the order determined.

2. The method of claim 1 , wherein said total estimated time to completion of said read command is based on a time for completion of an erase operation on each of multiple said non-volatile memory dies.

3. The method of claim 1 , wherein said total estimated time to completion of said read command is based on an average time for completion corresponding to erase operations on multiple said non-volatile memory dies.

4. The method of claim 1 , wherein said total estimated time to completion of said read command is based on a time for completion of a read operation on each of multiple said non-volatile memory dies.

5. The method of claim 1 , wherein said total estimated time to completion of said read command is based on an average time for completion corresponding to read operations on multiple said non-volatile memory dies.

6. The method of claim 1 , wherein said total estimated time to completion of said read command is based on a time for completion of a write operation on each of multiple said non-volatile memory dies.

7. The method of claim 1 , wherein said total estimated time to completion of said read command is based on an average time for completion corresponding to write operations on multiple said non-volatile memory dies.

8. The method of claim 1 , wherein said total estimated time to completion of said read command is based on a time for completion of at least one of an erase operation, a read operation, and a write operation on each of multiple said non-volatile memory dies.

9. The method of claim 8 , wherein said total estimated time to completion of said read command is based on an average time for completion corresponding to said operations on said multiple non-volatile memory dies.

10. The method of claim 8 , wherein said total estimated time to completion of said read command is based on a maximum time for completion corresponding to said operations on said multiple non-volatile memory dies.

11. The method of claim 1 , further comprising:

determining, based on the length of said read command, the number of necessary read operations to said non-volatile memory dies to fulfill said read command.

12. The method of claim 1 , further comprising:

determining, based on the length of a page corresponding to one or more of said non-volatile memory dies, the number of necessary read operations to said non-volatile memory dies to fulfill said read command.

13. A solid-state data storage controller embodying one or more sequences of instructions which, when executed by one or more processors, cause performance of:

computing a total estimated time to completion of a data read command received from a host based on an estimated time to completion for each operation submitted to a plurality of non-volatile memory dies corresponding to said read command;

determining, based on said total estimated time to completion of said read command, in what order to return requested data to said host relative to other data read commands received from said host; and

returning said requested data to said host in the order determined.

14. The solid-state data storage controller of claim 13 , wherein said total estimated time to completion of said read command is based on a time for completion of at least one of an erase operation, a read operation, and a write operation on each of multiple said non-volatile memory dies.

15. The solid-state data storage controller of claim 14 , wherein said total estimated time to completion of said read command is based on an average time for completion corresponding to said operations on said multiple non-volatile memory dies.

16. The solid-state data storage controller of claim 14 , wherein said total estimated time to completion of said read command is based on a maximum time for completion corresponding to said operations on said multiple non-volatile memory dies.

17. The solid-state data storage controller of claim 13 , wherein said one or more sequences of instructions, when executed, further cause performance of:

determining, based on the length of said read command, the number of necessary read operations to said non-volatile memory dies to fulfill said read command.

18. The solid-state data storage controller of claim 13 , wherein said one or more sequences of instructions, when executed, further cause performance of:

determining, based on the length of a page corresponding to one or more of said non-volatile memory dies, the number of necessary read operations to said non-volatile memory dies to fulfill said read command.

19. A solid-state data storage device comprising non-volatile memory dies and a controller for managing operations on said non-volatile memory dies, said data storage device comprising:

said controller embodying one or more sequences of instructions which, when executed by one or more processors, cause performance of:

computing a total estimated time to completion of a data read command received from a host based on an estimated time to completion for each operation submitted to a plurality of non-volatile memory dies corresponding to said read command;

determining, based on said total estimated time to completion of said read command, in what order to return requested data to said host relative to other data read commands received from said host; and

returning said requested data to said host in the order determined.

20. The solid-state data storage device of claim 19 , wherein said total estimated time to completion of said read command is based on a time for completion of at least one of an erase operation, a read operation, and a write operation on each of multiple said non-volatile memory dies.

21. The solid-state data storage device of claim 20 , wherein said total estimated time to completion of said read command is based on an average time for completion corresponding to said operations on said multiple non-volatile memory dies.

22. The solid-state data storage device of claim 20 , wherein said total estimated time to completion of said read command is based on a maximum time for completion corresponding to said operations on said multiple non-volatile memory dies.

23. The solid-state data storage device of claim 19 , wherein said one or more sequences of instructions, when executed, further cause performance of:

determining, based on the length of said read command, the number of necessary read operations to said non-volatile memory dies to fulfill said read command.

24. The solid-state data storage device of claim 19 , wherein said one or more sequences of instructions, when executed, further cause performance of:

determining, based on the length of a page corresponding to one or more of said non-volatile memory dies, the number of necessary read operations to said non-volatile memory dies to fulfill said read command.

Assignments (10)
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT SERIAL NO 15/025,946 PREVIOUSLY RECORDED AT REEL: 040831 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2017
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043973/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040831/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2016
From: ALCANTARA, JOAO; SZUBBOCSEV, ZOLTAN
To: HGST NETHERLANDS B.V.
Reel/Frame 038592/0128 →
Continuity (3)
Continuation 14680657 · Apr 7, 2015
Continuation 13705103 · Dec 4, 2012
Related Publication 20160253095A1 · Sep 1, 2016