IP Library Granted Patent US 9,697,912
Granted Patent B2
US 9,697,912 · App. 15/164,956 · Granted Jul 4, 2017

Leakage current detection

Inventors: Feng Pan (Fremont, CA); Shigekazu Yamada (Tokyo, JP)
Assignee: Micron Technology, Inc.
G11C29/50G11C29/025G11C16/06G11C2029/5006
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Quick Facts
Patent No.
US 9,697,912
App. No.
15/164,956
Granted
Jul 4, 2017
Kind
B2
Abstract

A first switch is closed to initialize a circuit by charging a capacitance of the circuit. A second switch is closed to initialize an amplifier in unity-gain configuration. The amplifier is capacitively coupled to the circuit. The first switch and the second switch are then opened to detect a leakage current of the circuit by detecting a change in an output voltage of the amplifier.

Claims (73)

1. A system comprising:

an amplifier having a first input, a second input, and an output, the amplifier to receive a first reference voltage on the first input and a sample voltage on the second input to provide an output voltage on the output based on the first reference voltage and the sample voltage;

a first switch electrically coupled between a first node configured to receive a second reference voltage and a second node;

a second switch electrically coupled between the output of the amplifier and the second input of the amplifier;

a first capacitor directly electrically coupled between the output of the amplifier and the second node;

a second capacitor electrically coupled between the second input of the amplifier and the second node; and

a controller to control the first switch and the second switch.

2. The system of claim 1 , wherein the first switch and the second switch are closed to initialize the second node to the second reference voltage and to initialize the amplifier in unity-gain configuration, and

wherein the first switch and the second switch are opened to detect a leakage current by sensing a change in the output voltage of the amplifier.

3. The system of claim 1 , further comprising:

an analog-to-digital converter to convert the output voltage of the amplifier to a digital value.

4. The system of claim 3 ,

wherein the controller is to receive the digital value of the output voltage.

5. The system of claim 1 , wherein the second reference voltage is greater than the first reference voltage.

6. The system of claim 1 , wherein the first switch is closed to initialize a circuit electrically coupled to the second node by charging a capacitance of the circuit.

7. A method comprising:

closing a first switch to initialize a circuit by charging a capacitance of the circuit;

closing a second switch to initialize an amplifier in unity-gain configuration, the amplifier capacitively coupled to the circuit; and

opening the first switch and the second switch to detect a leakage current of the circuit by detecting a change in an output voltage of the amplifier.

8. The method of claim 7 , further comprising:

closing a third switch between the first switch and the circuit to initialize the circuit; and

opening the third switch prior to opening the first switch and the second switch.

9. The method of claim 7 , wherein closing the first switch electrically couples a reference voltage to the circuit.

10. The method of claim 7 , wherein closing the second switch initializes the output voltage of the amplifier to a reference voltage.

11. The method of claim 7 , further comprising:

detecting a change in the output voltage by converting the output voltage to a digital value and sampling the digital value in response to a sampling time elapsing from the opening of the first switch and the second switch.

12. A system comprising:

an array of memory cells comprising a plurality of access lines;

a plurality of access line switches, each access line switch to individually select an access line;

an amplifier having a first input, a second input, and an output, the amplifier to receive a first reference voltage on the first input and an sample voltage on the second input to provide an output voltage on the output based on the first reference voltage and the sample voltage;

a first switch electrically coupled between a node configured to receive a second reference voltage and each of the access line switches;

a second switch electrically coupled between the output of the amplifier and the second input of the amplifier;

a first capacitor electrically coupled between the output of the amplifier and each access line switch;

a second capacitor electrically coupled between the second input of the amplifier and each access line switch; and

a controller to control the first switch, the second switch, and each access line switch,

wherein the first switch, the second switch, and each access line switch is closed to initialize the access lines to the second reference voltage and to initialize the amplifier in unity-gain configuration,

wherein the first switch and the second switch remain closed and each access line switch is opened to develop a signal on each access line, and

wherein the first switch and the second switch are opened and the access line switches are closed and opened sequentially to detect a leakage current of each access line by sensing a change in the output voltage of the amplifier while each access line switch is closed.

13. The system of claim 12 , further comprising:

an analog-to-digital converter to convert the output voltage of the amplifier to a digital value.

14. The system of claim 13 ,

wherein the controller is to receive the digital value of the output voltage.

15. The system of claim 12 , wherein the second reference voltage is greater than the first reference voltage.

16. The system of claim 12 , wherein the first switch is closed and each access line switch is closed to charge a capacitance of each access line.

17. A method comprising:

closing each of a plurality of access line switches, each access line switch electrically coupled to an access line of an array of memory cells;

closing a first switch to initialize each access line by charging a capacitance of each access line;

closing a second switch to initialize an amplifier in unity-gain configuration, the amplifier capacitively coupled to each access line when a respective access line switch is closed;

opening each access line switch to develop a signal on each access line with the first switch and the second switch closed; and

opening the first switch and the second switch and closing the access line switch of a selected access line to detect a leakage current of the selected access line by detecting a change in the output voltage of the amplifier.

18. The method of claim 17 , wherein detecting the change in the output voltage of the amplifier comprises converting the output voltage to a digital value and sampling the digital value in response to a sampling time elapsing from the closing of the access line switch of the selected access line.

19. The method of claim 17 , further comprising:

opening the access line switch of the selected access line; and

closing the access line switch of a further selected access line to detect a leakage current of the further selected access line by detecting a change in the output voltage of the amplifier.

20. The method of claim 17 , further comprising:

opening the access line switch of the selected access line;

closing the first switch and the second switch to initialize the amplifier in unity-gain configuration; and

opening the first switch and the second switch and closing the access line switch of a further selected access line to detect a leakage current of the further selected access line by detecting a change in the output voltage of the amplifier.

21. The method of claim 17 , wherein detecting the leakage current of the selected access line comprises detecting an increase in the output voltage proportional to the leakage current.

22. The method of claim 17 , wherein closing the second switch initializes the output voltage of the amplifier to a reference voltage.

23. A method comprising:

initializing access lines of an array of memory cells by charging a capacitance of each access line;

initializing an amplifier in unity-gain configuration;

developing a signal on each access line while maintaining the unity gain initialization of the amplifier;

reconfiguring the amplifier to detect leakage current; and

sequentially detecting a leakage current of each access line by sensing, for each access line, a change in an output voltage of the amplifier after a sampling time has elapsed from an access line being capacitively coupled to the amplifier.

24. The method of claim 23 , further comprising:

initializing select lines of the array of memory cells by charging a capacitance of each select line;

developing a signal on each select line while maintaining the unity gain initialization of the amplifier; and

with the amplifier reconfigured to detect leakage current, sequentially detecting a leakage current of each select line by sensing, for each select line, a change in the output voltage of the amplifier after the sampling time has elapsed from a select line being capacitively coupled to the amplifier.

25. The method of claim 23 , wherein initializing the access lines comprises applying a first reference voltage to the access lines, and

wherein initializing the amplifier in unity-gain configuration comprises initializing the output voltage of the amplifier to a second reference voltage less than the first reference voltage.

26. The method of claim 23 , wherein sensing the change in the output voltage of the amplifier comprises converting the output voltage to a digital value and sampling the digital value in response to the sampling time elapsing.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050676/0782 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046635/0634 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Aug 26, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 039841/0207 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Aug 25, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 039824/0681 →
Continuity (2)
Provisional Application 62166313 · May 26, 2015
Related Publication 20160351274A1 · Dec 1, 2016