IP Library › Granted Patent US 10,320,562
Granted Patent B2
US 10,320,562 · App. 15/169,831 · Granted Jun 11, 2019

Application specific low-power secure key

Inventors: Eran Glickman (Rishon Le Zion, IL); Ron M. Bar (Ramat Hasharon, IL); Omer Sharon (Modiin, IL)
Assignee: NXP USA, Inc.
H04L9/0861G06F21/75H04L9/0891
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Quick Facts
Patent No.
US 10,320,562
App. No.
15/169,831
Granted
Jun 11, 2019
Kind
B2
Abstract

A key generator including a low-power key adjust circuit, and a high-power key adjust circuit. The low-power key adjust circuit including a storage location to store an original key, a shifter to shift the original key by a number of steps to shift to create a first key, and an output to provide the first key. The high-power key adjust circuit including an input coupled to the output of the low-power key adjust circuit to receive the first key, a scrambler to scramble the first key to create a scrambled key, and select circuitry to select either the first key or the scrambled key to output from the high-power key adjust circuit based on a bit in a configuration register.

Claims (46)

1. A method comprising:

shifting, by a shifter of a low-power key adjust circuit, an original key by a number of steps to shift to create a shifted key;

providing, from the low-power key adjust circuit, a first key based on the shifted key to a first scrambler of a high-power key adjust circuit;

scrambling, at the first scrambler of the high-power key adjust circuit, the first key to create a second key that is scrambled;

outputting, at the high-power key adjust circuity, either the first key or the second key from the high-power key adjust circuit based on a select field in a configuration register, wherein if the select field is asserted, the second key is selected, and

wherein if the select field is negated, the first key is selected; and

encrypting data using either the first key or the second key that is outputted at the high-power key adjust circuitry.

2. The method of claim 1 further comprising:

storing, at a storage location of the high-power key adjust circuit, the second key prior to the outputting of the first key or the second key.

3. The method of claim 1 further comprising:

scrambling, at a second scrambler of the low-power key adjust circuit, the original key prior to creating the shifted key.

4. The method of claim 1 further comprising:

determining, by the low-power key adjust circuit, whether a keep field in the configuration register is set to a predetermined value; and

in response to the keep field being set to the predetermined value, storing the shifted key at the low-power key adjust circuit as a new original key, otherwise, shifting the shifted key to revert back to the original key.

5. The method of claim 1 further comprising:

determining whether the second key is valid prior to selecting either the first key or the second key; and

in response to the second key being valid, storing a first value in a trivial field of the configuration register, otherwise, storing a second value in the trivial field of the configuration register.

6. The method of claim 1 wherein the shifted key is scrambled based on an application identification, wherein the application identification identifies an application to utilize a key output from the high-power key adjust circuit.

7. The method of claim 1 wherein the low-power key adjust circuit is provided power via a battery.

8. A key generator comprising:

a low-power key adjust circuit comprising a storage location to store an original key, a shifter to shift the original key by a number of steps to shift to create a first key, and an output to provide the first key; and

a high-power key adjust circuit comprising an input coupled to the output of the low-power key adjust circuit to receive the first key, a first scrambler to scramble the first key to create a scrambled key, and select circuitry to select either the first key or the scrambled key to output from the high-power key adjust circuit based on a bit in a configuration register; and

to encrypt data using either the first key or the scrambled key that is outputted at the high-power key adjust circuitry.

9. The key generator of claim 8 the low-power key adjust circuit further includes:

a second scrambler, the second scrambler to scramble the original key prior to the shifter creating the first key.

10. The key generator of claim 8 the low-power key adjust circuit further to determine whether a keep field in the configuration register is set to a predetermined value; and in response to the keep field being set to the predetermined value, to store the first key as a new original key, otherwise, to shift the first key to revert back to the original key.

11. The key generator of claim 8 the high-power key adjust circuit further to determine whether the scrambled key is valid prior to selecting either the first key or the scrambled key; and in response to a carbon copy key being usable, to store a first value in a trivial field of the configuration register, otherwise, to store a second value in the trivial field of the configuration register.

12. The key generator of claim 8 wherein the number of steps to shift the original key is stored as a value in a field of the configuration register.

13. The key generator of claim 8 wherein the first key is scrambled based on an application identification, wherein the application identification identifies an application to utilize a key output from the high-power key adjust circuit.

14. The key generator of claim 8 wherein the low-power key adjust circuit is provided power via a battery.

15. A method comprising:

shifting, by a shifter of a low-power key adjust circuit, an original key by a number of steps to shift to create a shifted key;

providing, from the low-power key adjust circuit, a first key based on the shifted key to a first scrambler of a high-power key adjust circuit;

scrambling, at the first scrambler of the high-power key adjust circuit, the first key to create a second key that is scrambled;

determining whether the second key is valid; and

outputting the second key from the high-power key adjust circuit in response to the second key being valid, otherwise outputting the first key from the high-power key adjust circuit; and

encrypting data using either the first key or the second key that s outputted at the high-power key adjust circuitry.

16. The method of claim 15 further comprising:

scrambling, at a second scrambler of the low-power key adjust circuit, the original key prior to creating the shifted key.

17. The method of claim 15 further comprising:

determining, by the low-power key adjust circuit, whether a keep field in a configuration register is set to a predetermined value; and

in response to the keep field being set to the predetermined value, storing the shifted key as a new original key, otherwise, shifting the shifted key to revert back to the original key.

18. The method of claim 15 further comprising:

providing, by the low-power key adjust circuit, a ready signal to the high-power key adjust circuit, wherein the ready signal indicates that key shifting is complete and that the first key is valid.

19. The method of claim 15 wherein the number of steps to shift the original key is stored as a value in a field of a configuration register.

20. The method of claim 15 wherein the shifted key is scrambled based on an application identification, wherein the application identification identifies an application to utilize a key output from the high-power key adjust circuit.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2016
From: GLICKMAN, ERAN; BAR, RON M.; SHARON, OMER
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 038852/0709 →
Continuity (1)
Related Publication 20170353305A1 · Dec 7, 2017