Method and apparatus for implementing periphery devices on a programmable circuit using partial reconfiguration

1. A method for designing a system on a target device, the method comprising:

identifying a first component in the system and a second component in the system that operate at a different time;

partitioning the first component and second component such that the first component is implemented by a first instance of a partial reconfigurable (PR) module on the target device and the second component is implemented by a second instance of the PR module; and

generating a reconfiguration control logic unit for the system that initiates the first instance and the second instance of the PR module in response to user input, wherein at least one of the identifying, partitioning, and generating is performed by a processor.

2. The method of claim 1 , wherein each of the first and second instances of the PR module comprises a unique circuit description of the PR module and each of the different circuit description interfaces with a same static logic.

3. The method of claim 1 further comprising:

synthesizing the system;

generating a floor plan for the system;

placing the system according to the floor plan on the target device; and

routing the system on the target device.

4. The method of claim 1 , wherein first component comprises a sequencer unit that configures a physical interface during the first instance of the PR module, and the second component comprises a controller unit that translates commands to the physical interface during the second instance of the PR module.

5. The method of claim 1 , wherein the PR module utilizes one or more resources on the target device to implement the sequencer unit in the first instance and to implement the controller unit in the second instance.

6. The method of claim 1 , wherein the second component occupies a location on the target device in the second instance of the PR module formerly occupied by the first component during the first instance of the PR module.

7. A non-transitory computer readable medium including a sequence of instructions stored thereon for causing a computer to execute a method comprising:

identifying a first component and a second component that operate at a different time on a system;

partitioning the first component and second component such that the first component is implemented by a first instance of a partial reconfigurable (PR) module and the second component is implemented by a second instance of the PR module; and

generating a reconfiguration control logic unit for the system that initiates the first instance and the second instance of the PR module in response to user input.

8. The non-transitory computer readable medium of claim 7 , wherein each of the first and second instances of the PR module comprises a unique circuit description of the PR module and each of the different circuit description interfaces with a same static logic.

9. The non-transitory computer readable medium of claim 8 , wherein the method further comprises:

synthesizing the system;

generating a floor plan for the system;

placing the system according to the floor plan on a target device; and

routing the system on the target device.

10. The non-transitory computer readable medium of claim 7 , wherein first component comprises a sequencer unit that configures a physical interface during the first instance of the PR module, and the second component comprises a controller unit that translates commands to the physical interface during the second instance of the PR module.

11. The non-transitory computer readable medium of claim 7 , wherein the PR module utilizes one or more resources on the target device to implement the sequencer unit in the first instance and to implement the controller unit in the second instance.

12. The non-transitory computer readable medium of claim 7 , wherein the second component occupies a location on the target device in the second instance of the PR module formerly occupied by the first component during the first instance of the PR module.

13. A system designer, comprising:

a component analyzer unit that identifies a first component and a second component that operate at a different time, that partitions the first component and the second component such that the first component is implemented by a first instance of a partial reconfigurable (PR) module and the second component is implemented by a second instance of the PR module, and that generates a reconfiguration control logic unit that initiates the first instance and the second instance of the PR module in response to user input, wherein the component analyzer unit is implemented by a processor.

14. The system designer of claim 13 further comprising:

a synthesis unit that synthesizes the PR module with static modules;

a floor planning unit that generates a floor plan for the system on a target device;

a placement unit that places the system according to the floor plan on the target device; and

a routing unit that routes the system on the target device.

15. The system designer of claim 13 , wherein each of the first and second instances of the PR module comprises a unique circuit description of the PR module and each of the different circuit description interfaces with a same static logic.

16. A programmable circuit, comprising:

a physical interface;

a partial reconfigurable (PR) module that implements a first component during a first instance of the PR module, and a second component during a second instance of the PR module; and

a reconfiguration control logic unit that initiates the first instance and the second instance of the PR module in response to user input.

17. The programmable circuit of claim 16 , wherein the PR module utilizes one or more resources on the programmable circuit used to implement the first component in the first instance and to implement the second component in the second instance.

18. The programmable circuit of claim 16 , wherein the second component occupies a location on the programmable circuit in the second instance of the PR module formerly occupied by the first component during the first instance of the PR module.

19. The programmable circuit of claim 1 further comprising a selector that couples the PR module to the physical interface, wherein said selector transmits valid data to the physical interface during reconfiguration of the PR module.

20. The programmable circuit of claim 1 , wherein the first component is a sequencer unit, and the second component is a controller unit.