IP Library Granted Patent US 9,766,830
Granted Patent B2
US 9,766,830 · App. 15/171,677 · Granted Sep 19, 2017

Power consumption control

Inventors: Krishnam R. Datla (San Jose, CA); William H. Radke (Los Gatos, CA); Robin Sarno (Pleasanton, CA); Laszlo Borbely-Bartis (Santa Clara, CA); Ken Kannampuzha (Fremont, CA)
Assignee: Micron Technology, Inc.
G06F3/0625G06F3/0653G06F3/0688G11C5/14G11C16/30
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Quick Facts
Patent No.
US 9,766,830
App. No.
15/171,677
Granted
Sep 19, 2017
Kind
B2
Abstract

The present disclosure includes apparatuses and methods for power consumption control. A number of embodiments include determining power consumption information for each phase in a combination of phases of a command, and authorizing execution of at least one of the phases in the combination based, at least partially, on the power consumption information determined for the at least one of the phases.

Claims (28)

1. A method for controlling power consumption in an apparatus, comprising:

determining power consumption information for each phase of a number of phases that are part of a combination of phases of a command, wherein the combination of phases include a data transfer phase;

assigning power credits to each phase of the number of phases based on the determined power consumption information; and

controlling power consumption of the apparatus by executing at least one of the number of phases in the combination based on the power credits.

2. The method of claim 1 , including controlling power consumption such that an average power consumption is maintained.

3. The method of claim 1 , wherein the combination of phases include an array program phase.

4. The method of claim 1 , wherein the combination of phases include an array sense phase.

5. The method of claim 1 , wherein controlling power consumption includes authorizing execution of at least one of the number of phases based on an amount of previously authorized, but unused, power credits.

6. The method of claim 1 , wherein controlling power consumption includes executing the at least one of the number of phases whose sum of associated power credits is less than or equal to a threshold amount of power credits available for authorization.

7. The method of claim 1 , wherein controlling power consumption includes executing the at least one of the number of phases whose sum of associated power credits is greater than a threshold amount of power credits available for authorization to compensate for a number of power credits that were authorized for use, but not used to execute a previously authorized phase.

8. A method for controlling power consumption in an apparatus, comprising:

receiving a command to perform an operation on the apparatus, wherein the command is separable into a combination of phases and the combination of phases include an array program phase and a data transfer phase;

sending a number of requests to a power control manager for authorization to execute the combination of phases, wherein each of the number of requests is associated with a respective phase of the combination of phases; and

receiving a number of responses to the number of requests, wherein the number of responses authorize execution of at least one phase of the combination of phases to control power consumption of the apparatus.

9. The method of claim 8 , wherein the method includes retrieving the power consumption information from a data structure.

10. The method of claim 8 , wherein sending the number of requests to the power control manager for authorization to execute the combination of phases includes sending the phase power consumption information in the number of requests.

11. The method of claim 8 , wherein receiving the number of responses includes receiving authorization to execute the at least one phase of the combination of phases responsive to a determination that a sum of power credits corresponding to a number of phases that includes the at least one phase of the combination of phases is greater than a threshold amount of power credits if a number of power credits that were previously authorized for use have not been used.

12. The method of claim 8 , wherein receiving the number of responses includes receiving authorization to execute the at least one phase of the combination of phases responsive to a determination that a sum of power credits corresponding to the at least one phase of the combination of the number of phases is less than or equal to a threshold amount of power credits.

13. The method of claim 8 , wherein the method includes separating the command into the combination of phases via a controller.

14. An apparatus, comprising:

an array of memory cells; and

a controller coupled to the array and configured to:

receive a command to perform an operation on the apparatus, wherein the command comprises a combination of a number of phases and the combination of the number of phases include a data transfer phase and an array sense phase; and

authorize execution of a portion of the number of phases to control power consumption of the apparatus.

15. The apparatus of claim 14 , wherein the controller is configured to place at least one of the phases on hold based on the amount of power available to execute the number of the phases.

16. The apparatus of claim 14 , wherein the controller is configured to authorize execution of the at least one of the phases placed on hold after at least some of the portion of the number of the phases have been executed.

17. The apparatus of claim 14 , wherein the controller is configured to authorize execution of the number of the phases to maintain a desired average power consumption.

18. The apparatus of claim 14 , wherein the command comprises a read command having an array sense phase and a number of data transfer phases.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050676/0782 →
RELEASE OF SECURITY INTEREST Recorded Jul 20, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 046635/0634 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Aug 26, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 039841/0207 →
SUPPLEMENT NO. 1 TO PATENT SECURITY AGREEMENT Recorded Aug 25, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 039824/0681 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2016
From: DATLA, KRISHNAM R.; RADKE, WILLIAM H.; SARNO, ROBIN; BORBELY-BARTIS, LASZLO; KANNAMPUZHA, KEN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 038788/0441 →
Continuity (3)
Continuation 14482408 · Sep 10, 2014
Continuation 13625104 · Sep 24, 2012
Related Publication 20160274812A1 · Sep 22, 2016