IP Library Patent Application 15173251
Patent Application
App. No. 15/173,251

Integrated Circuit Assembly and Method of Making

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Quick Facts
Patent No.
US None
App. No.
15/173,251
Abstract

An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface. A first active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the first active layer and formed on the second surface of the insulating layer. A substrate having a first surface and a second surface, with a second active layer formed in the first surface, is provided such that the first active layer is coupled to the second surface of the substrate.

Claims (48)

1 . An integrated circuit assembly comprising:

an insulating layer having a first surface and a second surface;

a first active layer contacting the first surface of the insulating layer;

a metal bond pad formed on the second surface of the insulating layer;

wherein the metal bond pad is electrically coupled to the first active layer;

a substrate having a first surface and a second surface, the first active layer being coupled to the second surface of the substrate;

a second active layer formed on the first surface of the substrate;

a first singulated wafer portion including the insulating layer and the first active layer; and

a second singulated wafer portion bonded to the first singulated wafer portion, the second wafer singulated portion including the substrate and the second active layer.

2 . The integrated circuit assembly of claim 1 , further comprising: a printed circuit board, the printed circuit board being electrically coupled to the metal bond pad.

3 . The integrated circuit assembly of claim 2 , wherein the printed circuit board is electrically coupled with a solder bump to the first active layer.

4 . The integrated circuit assembly of claim 2 , wherein the printed circuit board is electrically coupled to the second active layer through a wire bond.

5 . The assembly of claim 2 , wherein the printed circuit board is electrically coupled with a solder bump to the second active layer.

6 . The assembly of claim 2 , wherein the printed circuit board is electrically coupled to the first layer through a wire bond.

7 . The integrated circuit assembly of claim 1 , wherein the substrate is less than 100 microns thick.

8 . The integrated circuit assembly of claim 1 , wherein the substrate is less than 30 microns thick.

9 . The integrated circuit assembly of claim 1 , wherein the integrated circuit assembly does not include a vertical electrical connection through the first singulated wafer portion and the second singulated wafer portion.

10 . The integrated circuit assembly of claim 1 , wherein the first active layer or the second active layer includes passive devices.

11 . A singulated integrated circuit assembly comprising:

a silicon on insulator (SOI) wafer portion including a first active layer formed on top of an insulating layer, the SOI wafer portion further including a first plurality of metal bond pads on a back side of the insulating layer, each of the metal bond pads of the first plurality of metal bond pads being in communication with active devices of the first active layer; and

a first wafer portion having a second active layer formed on top of a semiconductor substrate layer, the first wafer portion further including a second plurality of metal bond pads formed above the second active layer and being in communication with active devices of the second active layer, further wherein a back side of the first wafer portion is bonded to a top side of the SOI wafer portion.

12 . The singulated integrated circuit assembly of claim 11 , further comprising:

a plurality of solder bumps disposed on the first plurality of metal bond pads; and

a printed circuit board having a third plurality of metal bond pads in communication with the plurality of solder bumps.

13 . The singulated integrated circuit assembly of claim 11 , further comprising:

a plurality of solder bumps disposed on the second plurality of metal bond pads; and

a printed circuit board having a third plurality of metal bond pads in communication with the plurality of solder bumps.

14 . The singulated integrated circuit assembly of claim 11 , further comprising:

a first printed circuit board coupled with the first plurality of metal bond pads; and

a plurality of bonding wires coupling the second plurality of metal bond pads to the first printed circuit board.

15 . The singulated integrated circuit assembly of claim 11 , further comprising:

a first printed circuit board coupled with the second plurality of metal bond pads; and

a plurality of bonding wires coupling the first plurality of metal bond pads to the first printed circuit board.

16 . A singulated integrated circuit assembly comprising:

a first wafer portion having a first active layer formed on top of a semiconductor substrate, the first wafer portion further including a first metal bond pad formed on a top side of the first wafer portion and coupled with a first active device of the first active layer; and

a second wafer portion having a second active layer formed on a top side of an insulator layer and having a second metal bond pad formed on a back side of the insulator layer, the second bond pad being in electrical communication with a second active device of the second active layer, further wherein a top side of the second wafer portion is bonded to a back side of the first wafer portion.

17 . The singulated integrated circuit assembly of claim 11 , further comprising:

a solder bump disposed on the first metal bond pad; and

a printed circuit board having a third metal bond pad in communication with the solder bump.

18 . The singulated integrated circuit assembly of claim 11 , further comprising:

a solder bump disposed on the second metal bond pad; and

a printed circuit board having a third metal bond pad in communication with the solder bump.

19 . The singulated integrated circuit assembly of claim 11 , further comprising:

a first printed circuit board coupled with the first metal bond pad; and

a bonding wire coupling the second metal bond pad to the first printed circuit board.

20 . The singulated integrated circuit assembly of claim 11 , further comprising:

a first printed circuit board coupled with the second metal bond pad; and

a bonding wire coupling the first metal bond pad to the first printed circuit board.

Assignments (4)
CHANGE OF NAME Recorded Oct 21, 2016
From: IO SEMICONDUCTOR INCORPORATED
To: SILANNA SEMICONDUCTOR U.S.A., INC.
Reel/Frame 040461/0930 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2016
From: QUALCOMM SWITCH CORP
To: QUALCOMM INCORPORATED
Reel/Frame 040302/0122 →
CHANGE OF NAME Recorded Oct 11, 2016
From: SILANNA SEMICONDUCTOR U.S.A., INC.
To: QUALCOMM SWITCH CORP
Reel/Frame 040302/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2016
From: STUBER, MICHAEL A.; MOLIN, STUART B.; DRUCKER, MARK; FOWLER, PETER
To: IO SEMICONDUCTOR, INC.
Reel/Frame 039981/0861 →