IP Library › Granted Patent US 9,985,118
Granted Patent B2
US 9,985,118 · App. 15/193,827 · Granted May 29, 2018

Method for manufacturing semiconductor device

Inventors: Toshinari Sasaki (Atsugi, JP); Junichiro Sakata (Atsugi, JP); Hiroki Ohara (Sagamihara, JP); Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/66969H01L27/124H01L27/1225H01L29/24H01L29/42356H01L29/42384H01L29/66742H01L29/7869H01L29/78606H01L29/78618H01L29/78696
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Quick Facts
Patent No.
US 9,985,118
App. No.
15/193,827
Granted
May 29, 2018
Kind
B2
Abstract

It is an object to provide a highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics. It is another object to manufacture a highly reliable semiconductor device at lower cost with high productivity. In a method for manufacturing a semiconductor device which includes a thin film transistor where a semiconductor layer having a channel formation region, a source region, and a drain region are formed using an oxide semiconductor layer, heat treatment (heat treatment for dehydration or dehydrogenation) is performed so as to improve the purity of the oxide semiconductor layer and reduce impurities such as moisture. Moreover, the oxide semiconductor layer subjected to the heat treatment is slowly cooled under an oxygen atmosphere.

Claims (18)

1. A method for manufacturing a semiconductor device comprising the steps of:

forming a first oxide semiconductor layer;

forming a second oxide semiconductor layer over the first oxide semiconductor layer;

performing a first heat treatment on the first oxide semiconductor layer and the second oxide semiconductor layer under an atmosphere comprising nitrogen to be dehydrated or dehydrogenated, wherein the first oxide semiconductor layer has a carrier density of 1×10 18 /cm 3 or more;

forming an oxide insulating layer over and in contact with a part of the first oxide semiconductor layer and the second oxide semiconductor layer; and

performing a second heat treatment on the oxide insulating layer,

wherein the first oxide semiconductor layer has a carrier density of less than 1×10 18 /cm 3 after the second heat treatment.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the first heat treatment is performed at 400° C. or higher.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein a temperature of the second heat treatment is lower than a temperature of the first heat treatment.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein a cooling is performed under an atmosphere including oxygen after the first heat treatment.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, gallium, and zinc.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, tin, and zinc.

7. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises indium, aluminum, and zinc.

8. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises tin and zinc.

9. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises tin, gallium, and zinc.

10. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the first oxide semiconductor layer and the second oxide semiconductor layer comprises tin, aluminum, and zinc.

11. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide insulating layer is in contact with a side surface of the second oxide semiconductor layer.

12. The method for manufacturing a semiconductor device according to claim 1 , wherein a thickness of the second oxide semiconductor layer is smaller than a thickness of the first oxide semiconductor layer.

Priority Claims (1)
JP 2009-156414 · Jun 30, 2009 · national
Continuity (8)
Continuation 15057445 · Mar 1, 2016
Continuation 14867636 · Sep 28, 2015
Continuation 14247665 · Apr 8, 2014
Continuation 13967605 · Aug 15, 2013
Continuation 13767335 · Feb 14, 2013
Continuation 13495481 · Jun 13, 2012
Continuation 12826015 · Jun 29, 2010
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