Immersion interconnections for semiconductor devices and methods of manufacture thereof
Semiconductor devices and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a device includes coupling a first semiconductor device to a second semiconductor device by spacers. The first semiconductor device has first contact pads disposed thereon, and the second semiconductor device has second contact pads disposed thereon. The method includes forming an immersion interconnection between the first contact pads of the first semiconductor device and the second contact pads of the second semiconductor device.
1. A method of manufacturing a device, the method comprising:
coupling a first semiconductor device to a second semiconductor device by a plurality of non-conductive spacers, the first semiconductor device having a plurality of first contact pads disposed thereon, the second semiconductor device having a plurality of second contact pads disposed thereon, the plurality of non-conductive spacers being spaced apart from the first contact pads and the second contact pads, the plurality of first contact pads being electrically isolated from the plurality of second contact pads after coupling the first semiconductor device to the second semiconductor device; and
thereafter, forming an immersion interconnection between one of the plurality of first contact pads of the first semiconductor device and a corresponding one of the plurality of second contact pads of the second semiconductor device by plating a conductive material extending from a surface of the plurality of first contact pads facing the second semiconductor device and further extending from a surface of the plurality of second contact pads facing the first semiconductor device while the first semiconductor device and the second semiconductor device are at least partially submerged in a solvent.
2. The method according to claim 1 , wherein coupling the first semiconductor device to the second semiconductor device comprises coupling a first semiconductor device comprising a wafer, an integrated circuit die, or a plurality of integrated circuit dies to the second semiconductor device.
3. The method according to claim 1 , wherein coupling the first semiconductor device to the second semiconductor device comprises coupling the first semiconductor device to a second semiconductor device comprising a wafer, an integrated circuit die, or a plurality of integrated circuit dies.
4. The method according to claim 1 , further comprising removing the plurality of non-conductive spacers.
5. The method according to claim 1 , wherein the plurality of non-conductive spacers is disposed on proximate edges or a perimeter of the first semiconductor device or the second semiconductor device.
6. The method according to claim 1 , wherein coupling the first semiconductor device to the second semiconductor device comprises forming a three-dimensional integrated circuit (3DIC) device.
7. A method of manufacturing a device, the method comprising:
coupling a first semiconductor device to a second semiconductor device by a plurality of non-conductive spacers, the first semiconductor device having a plurality of first contact pads disposed thereon, the second semiconductor device having a plurality of second contact pads disposed thereon, the plurality of non-conductive spacers being spaced apart from the first contact pads and the second contact pads, and the plurality of first contact pads being electrically isolated from the plurality of second contact pads after coupling the first semiconductor device to the second semiconductor device; and
thereafter, using an electroless plating process to form an immersion interconnection between one of the plurality of first contact pads of the first semiconductor device and a corresponding one of the plurality of second contact pads of the second semiconductor device, wherein the immersion interconnection is formed by plating a conductive material extending from a surface of the plurality of first contact pads facing the second semiconductor device and further extending from a surface of the plurality of second contact pads facing the first semiconductor device while the first semiconductor device and the second semiconductor device are at least partially submerged in a solvent.
8. The method according to claim 7 , wherein the second semiconductor device is in wafer form, and wherein the method further comprises singulating the second semiconductor device.
9. The method according to claim 7 , wherein coupling the first semiconductor device comprises coupling a first integrated circuit die, wherein the second semiconductor device comprises a second integrated circuit die, and wherein the method further comprises: forming a molding material around the second integrated circuit die; forming a plurality of through-vias in the molding material; coupling an interconnect structure to the molding material, the plurality of through-vias, and the second integrated circuit die; and coupling a plurality of connectors to the interconnect structure.
10. The method according to claim 9 , wherein the interconnect structure comprises fan-out wiring.
11. The method according to claim 9 , wherein the second semiconductor device comprises a plurality of the second integrated circuit dies, and wherein the method comprises forming the molding material around the plurality of second integrated circuit dies.
12. The method according to claim 7 , further comprising packaging the first semiconductor device and the second semiconductor device to form a chip-on-wafer-on-substrate (CoWoS) device or a three dimensional integrated fan-out (3D InFO) device.
13. A method of manufacturing a device, the method comprising:
coupling a first semiconductor device to a second semiconductor device by a plurality of non-conductive spacers, the first semiconductor device having a plurality of first contact pads disposed thereon, the second semiconductor device having a plurality of second contact pads disposed thereon and electrically isolated from the plurality of first contact pads across a gap between the coupled first and second semiconductor devices, the plurality of non-conductive spacers being spaced apart from the first contact pads and the second contact pads; and
forming a conductive immersion interconnection between one of the plurality of first contact pads of the first semiconductor device and a corresponding one of the plurality of second contact pads of the second semiconductor device through an action of a solvent flow in the gap upon a surface of the one of the plurality of first contacts pads of the first semiconductor device and upon a surface of the corresponding one of the plurality of second contact pads of the semiconductor device, wherein the solvent comprises a conductive material.
14. The method according to claim 13 , wherein coupling the first semiconductor device to the second semiconductor device comprises coupling a first semiconductor device comprising a wafer, an integrated circuit die, or a plurality of integrated circuit dies to the second semiconductor device.
15. The method according to claim 13 , wherein coupling the first semiconductor device to the second semiconductor device comprises coupling the first semiconductor device to a second semiconductor device comprising a wafer, an integrated circuit die, or a plurality of integrated circuit dies.
16. The method according to claim 13 , wherein the action of the solvent flow comprises plating a conductive material extending from a surface of the plurality of first contact pads facing the second semiconductor device and further extending from a surface of the plurality of second contact pads facing the first semiconductor device while the first semiconductor device and the second semiconductor device are at least partially submerged in a solvent.
17. The method according to claim 13 , further comprising removing the plurality of non-conductive spacers.
18. The method according to claim 13 , wherein the plurality of non-conductive spacers is disposed on proximate edges or a perimeter of the first semiconductor device or the second semiconductor device.
19. The method according to claim 13 , wherein coupling the first semiconductor device to the second semiconductor device comprises forming a three-dimensional integrated circuit (3DIC) device.
20. The method according to claim 13 , wherein the conductive material comprises Cu, Ni, Pd, Au, Co, Ag, Sn, Pb, Rh, Fe, and/or combinations thereof.