IP Library › Granted Patent US 10,130,302
Granted Patent B2
US 10,130,302 · App. 15/196,558 · Granted Nov 20, 2018

Via and trench filling using injection molded soldering

Inventors: John U. Knickerbocker (Monroe, NY); Shriya Kumar (New York, NY); Jae-Woong Nah (Closter, NJ)
Assignee: International Business Machines Corporation
A61B5/68A61M5/00B23K3/0638H01L21/486H01L21/76816H01L21/76852H01L21/76883H01L21/76898H01L23/15H01L23/49811H01L23/49827H01L23/49838H01L23/5389H01L23/53228H01L23/53238H01L23/53242H01L23/53252H01L23/53266H01L23/66H01L24/19H01L24/20H01L24/27H01L24/32H01L24/64H01L24/69H01L24/83H01L24/89H05K1/0306H05K3/4038A61B2562/12A61M2207/00B23K2201/36H01L2223/6677H01L2224/27312H01L2224/325H01L2224/32111H01L2224/32235H01L2224/64H01L2224/69H01L2224/83801H01L2224/89H01L2224/96H01L2924/014H01L2924/1434H01L2924/15332H05K2201/0305
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Quick Facts
Patent No.
US 10,130,302
App. No.
15/196,558
Granted
Nov 20, 2018
Kind
B2
Abstract

A method includes forming one or more vias in a substrate, forming at least one liner on at least one sidewall of at least one of the vias, and filling said at least one via with solder material using injection molded soldering. The at least one liner may comprise a solder adhesion layer, a barrier layer, or a combination of a barrier layer and a solder adhesion layer.

Claims (30)

1. A method comprising:

forming one or more vias in a substrate;

forming at least one liner on at least one sidewall of at least one of the vias, said at least one liner comprising a solder adhesion layer;

forming a metal layer on the solder adhesion layer;

filling said at least one via with solder material using injection molded soldering; and

thermally annealing the filled via to form an intermetallic compound from the solder material and at least a portion of the metal layer;

wherein the liner and the metal layer are formed with a total thickness in the range of one-half to three-quarters of a diameter of said at least one via;

wherein the at least one via is formed with a height to width ratio of five to one or greater;

wherein forming the one or more vias comprises forming at least a first via having a first thickness and forming at least a second via having a second thickness different than the first thickness;

wherein forming said at least one liner comprises forming at least a first liner comprising the solder adhesion layer on at least one sidewall of the first via and forming at least a second liner comprising the solder adhesion layer on at least one sidewall of the second via;

wherein the first liner and the second liner have a same thickness; and

wherein the metal layer comprises a first metal coated with a second metal, the first metal comprising nickel, and the second metal comprising gold.

2. The method of claim 1 , wherein the substrate comprises a glass substrate.

3. The method of claim 2 , wherein the solder adhesion layer comprises at least one of: a copper layer; a nickel layer; a chromium layer; a gold layer; and a titanium layer.

4. The method of claim 2 , wherein the solder adhesion layer has a thickness independent of the size of the at least one via.

5. The method of claim 1 , wherein the substrate comprises a silicon substrate and said at least one liner comprises a barrier layer and the solder adhesion layer.

6. The method of claim 5 , wherein the barrier layer comprises at least one of: a nickel layer; a titanium layer; a titanium nitride layer; a tantalum layer; and a tantalum nitride layer.

7. The method of claim 6 , wherein the solder adhesion layer comprises at least one of: a copper layer; a nickel layer; a chromium layer; a gold layer; and a titanium layer.

8. The method of claim 5 , wherein, the barrier layer has a first thickness and the solder adhesion layer has a second thickness, the second thickness being greater than the first thickness.

9. The method of claim 1 , wherein thermally annealing the filled via utilizes a temperature above the melting point of the solder material.

10. The method of claim 9 , wherein the intermetallic compound has a higher melting temperature than the solder material, the intermetallic compound providing increased current carrying capacity relative to the solder material.

11. The method of claim 1 , wherein thermally annealing the filled via causes a reaction between tin (Sn) in the solder material and at least one of nickel (Ni) and copper (Cu) in the metal layer.

12. The method of claim 11 , wherein the reaction forms the intermetallic compound, the intermetallic compound comprising at least one of Cu 3 Sn, Cu 6 Sn 5 and Ni 3 Sn 4 .

13. The method of claim 1 , wherein filling said at least one via with solder material using injection molded soldering comprises sweeping an injection molded soldering head across a surface of the substrate, the injection molded soldering head comprising a vacuum and a repository of solder material, the vacuum creating a vacuum in said at least one via as the injection molded soldering head sweeps across the surface of the substrate prior to delivering the solder material to said at least one via from the repository.

14. The method of claim 1 , wherein thermally annealing the filled via transforms all of the metal layer into the intermetallic compound.

15. The method of claim 1 , wherein forming the metal layer comprises:

forming a first metal layer on the solder adhesion layer of the first liner on said at least one sidewall of the first via; and

forming a second metal layer on the solder adhesion layer of the second liner on said at least one sidewall of the second via; and

wherein the first metal layer and the second metal layer have a same thickness.

16. The method of claim 1 , wherein the second metal coating the first metal has a thickness of 0.1 to 1 microns.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2016
From: KNICKERBOCKER, JOHN U.; KUMAR, SHRIYA; NAH, JAE-WOONG
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 039042/0540 →
Continuity (1)
Related Publication 20180005879A1 · Jan 4, 2018
Cited By (1)
US 12,336,112