Methods of forming a protection layer on an isolation region of IC products comprising FinFET devices

1. A method of forming a FinFET device, comprising:

forming a plurality of fin-formation trenches in a semiconductor substrate so as to define a plurality of fins;

forming a recessed layer of insulating material comprising a first insulating material in said fin-formation trenches, wherein a portion of each of said plurality of fins is exposed above an upper surface of said recessed layer of insulating material;

after forming said recessed layer of insulating material, masking a first portion of a first fin of said plurality of fins and performing at least one first etching process to remove at least a portion of an unmasked second fin of said plurality of fins;

after performing said at least one first etching process, forming a device isolation region for said FinFET device that comprises a second insulating material; and

forming an isolation protection layer above said device isolation region, wherein said isolation protection layer comprises a different material than said second insulating material of said device isolation region.

2. The method of claim 1 , wherein said first and second insulating materials comprise silicon dioxide and said isolation protection layer comprises one of silicon nitride, silicon oxynitride or SiBCN.

3. The method of claim 1 , wherein forming said isolation protection layer above said device isolation region comprises performing a directional deposition process so as to form said isolation protection layer above said device isolation region.

4. The method of claim 1 , wherein forming said isolation protection layer above said device isolation region comprises

performing a conformal deposition process so as to form a conformal isolation protection layer above said device isolation region;

masking portions of said conformal isolation protection layer positioned above said device isolation region while exposing other portions of said conformal isolation protection layer; and

removing said exposed portions of said conformal isolation protection layer.

5. The method of claim 1 , wherein masking said first portion of said first fin comprises:

forming a layer of sacrificial material above said recessed layer of insulating material in said fin-formation trenches and adjacent said first and second fins; and

removing a first portion of said layer of sacrificial material positioned adjacent said second fin while leaving a second portion of said layer of sacrificial material positioned adjacent said first fin in place wherein said layer of sacrificial material comprises said second portion.

6. The method of claim 1 , wherein masking said first portion of said first fin comprises forming a patterned fin masking layer that is at least partially positioned within said fin-formation trenches, wherein said patterned fin masking layer comprises at least one layer of material.

7. The method of claim 1 , wherein forming said device isolation region for said FinFET device comprises:

removing a portion of said recessed layer of insulating material so as to expose a substantially horizontal surface of said substrate and define an isolation region opening;

filling said isolation region opening with said second insulating material; and

performing a recess etching process of said second insulating material.

8. The method of claim 1 , wherein said at least one first etching process is performed so as to remove an entire vertical height of said unmasked portion of said second fin.

9. The method of claim 1 , wherein performing said at least one first etching process comprises performing a single etching process.

10. A method of forming a FinFET device, comprising:

forming a plurality of fin-formation trenches in a semiconductor substrate so as to define a plurality of fins;

forming a recessed layer of insulating material comprising a first insulating material in said fin-formation trenches, wherein a portion of each of said plurality of fins is exposed above an upper surface of said recessed layer of insulating material;

after forming said recessed layer of insulating material, forming a patterned fin masking layer above said substrate that covers a first portion of a first fin of said plurality of fins, exposes a second portion of said first fin and exposes at least a portion of a second fin of said plurality of fins;

with said patterned fin masking layer in position above said substrate, performing at least one first etching process to remove at least a portion of a vertical height of said exposed portions of said first and second fins;

after performing said at least one first etching process, forming a device isolation region for said FinFET device that comprises a second insulating material; and

forming an isolation protection layer above said device isolation region, wherein said isolation protection layer comprises a different material than said second insulating material of said device isolation region.

11. The method of claim 10 , wherein said first and second insulating materials comprise different insulating materials and wherein said isolation protection layer comprises a material that is different from both said first and second insulating materials.

12. The method of claim 10 , wherein forming said isolation protection layer above said device isolation region comprises:

performing a directional deposition process so as to form a first portion of said isolation protection layer above said patterned fin masking layer and a second portion of said isolation protection layer above said device isolation region;

masking said second portion of said isolation protection layer; and

removing said first portion of said isolation protection layer.

13. The method of claim 10 , wherein forming said isolation protection layer above said device isolation region comprises

performing a conformal deposition process so as to form a conformal isolation protection layer above said patterned fin masking layer and above said device isolation region;

masking portions of said conformal isolation protection layer positioned above said device isolation region while exposing other portions of said conformal isolation protection layer; and

removing said exposed portions of said conformal isolation protection layer.

14. The method of claim 10 , wherein forming said patterned fin masking layer comprises:

forming a layer of sacrificial material above said recessed layer of insulating material in said fin-formation trenches and adjacent said first and second fins; and

removing a first portion of said layer of sacrificial material positioned adjacent said second fin while leaving a second portion of said layer of sacrificial material positioned adjacent said first fin in place, wherein said layer of sacrificial material comprises said second portion.

15. The method of claim 10 , wherein forming said patterned fin masking layer comprises:

forming a first layer of sacrificial material above said recessed layer of insulating material in said fin-formation trenches and adjacent said first and second fins;

forming a second layer of sacrificial material on said first layer of sacrificial material;

removing a first portion of said second layer of sacrificial material from above said second fin while leaving a second portion of said second layer of sacrificial material positioned above said first fin; and

removing a first portion of said first layer of sacrificial material positioned adjacent said second fin while leaving a second portion of said first layer of sacrificial material positioned adjacent said first fin in place, wherein said patterned fin masking layer comprises said second portion of said first layer of sacrificial material and said second portion of said second layer of sacrificial material.

16. The method of claim 15 , wherein said first and second layers of sacrificial material comprise different materials.

17. The method of claim 10 wherein forming said device isolation region for said FinFET device comprises:

after performing said at least one first etching process, and with said patterned fin masking layer in position above said substrate, removing a portion of said recessed layer of insulating material so as to expose a substantially horizontal surface of said substrate and define an isolation region opening;

filling said isolation region opening with said second insulating material; and

performing a recess etching process of said second insulating material.