3D bonded semiconductor structure with an embedded capacitor
View Patent ↗A first semiconductor structure including a first bonding oxide layer having a first metallic structure embedded therein and a second semiconductor structure including a second bonding oxide layer having second metallic structure embedded therein are provided. A high-k dielectric material is formed on a surface of the first metallic structure. A nitride surface treatment process is performed to provide a nitrided surface layer to each structure. The nitrided surface layer includes nitridized oxide regions located in an upper portion of the bonding oxide layers and either a nitridized high-k dielectric material located in at least an upper portion of the high k dielectric material or a nitridized metallic region located in an upper portion of the second metallic structure. The nitrogen within the nitridized metallic region is then selectively removed to restore the upper portion of the second metallic structure to its original composition. Bonding is then performed.
1. A three-dimensional (3D) bonded semiconductor structure comprising:
a first semiconductor structure including a first wafer, a first interconnect structure, and a first bonding oxide layer containing first nitridized oxide regions and at least one nitridized high-k dielectric material embedded therein, wherein said at least one nitridized high-k dielectric material is located on a surface of a first metallic structure which is also embedded in said first bonding oxide layer; and
a second semiconductor structure including a second wafer, a second interconnect structure, and a second bonding oxide layer containing second nitridized oxide regions and at least one second metallic structure embedded therein, wherein a bonding interface is present between said first and second nitridized oxide regions and another bonding interface is present between a nitridized high-k dielectric material and said at least one second metallic structure.
2. The 3D bonded semiconductor structure of claim 1 , wherein each of said first and second interconnect structures comprises at least one interconnect dielectric material and one or more interconnect metallic structures embedded therein.
3. The 3D bonded semiconductor structure of claim 2 , wherein said at least one or more interconnect metallic structures are composed of copper, a copper-aluminum alloy, a copper manganese alloy, aluminum or an aluminum-copper alloy.
4. The 3D bonded semiconductor structure of claim 1 , wherein a non-nitridized high-k dielectric material is located between said nitridized high-k dielectric material and said first metallic structure.
5. The 3D bonded semiconductor structure of claim 1 , wherein said first and second metallic structures comprise tantalum, tungsten, cobalt, rhodium, ruthenium, aluminum, copper or alloys thereof.
6. The 3D bonded semiconductor structure of claim 1 , wherein said first and second nitridized oxide regions comprise an oxide and added nitrogen.
7. The 3D bonded semiconductor structure of claim 6 , wherein said added nitrogen is present in said first and second nitridized oxide regions in a content of from 10 atomic percent nitrogen to 50 atomic percent nitrogen.
8. The 3D bonded semiconductor structure of claim 1 , wherein said at least one first metallic structure has a topmost surface that is recessed relative to a topmost surface of said first bonding oxide layer.
9. The 3D bonded semiconductor structure of claim 1 , wherein said nitridized high-k dielectric material comprises HfO 2 , ZrO 2 , La 2 O 3 , Al 2 O 3 , TiO 2 , SrTiO 3 , LaAlO 3 , Y 2 O 3 , HfO x N y , ZrO x N y , La 2 O x N y , Al 2 O x N y , TiO x N y , SrTiO x N y , LaAlO x N y , Y 2 O x N y , SiON, SiN x , a silicate thereof, or an alloy thereof, wherein each value of x is independently from 0.5 to 3 and each value of y is independently from 0 to 2.
10. The 3D bonded semiconductor structure of claim 1 , wherein said first metallic structure, said nitridized high-k dielectric material, and said second metallic structure provide an embedded capacitor.