IP Library Granted Patent US 9,852,972
Granted Patent B2
US 9,852,972 · App. 15/218,848 · Granted Dec 26, 2017

Semiconductor device and method of aligning semiconductor wafers for bonding

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Quick Facts
Patent No.
US 9,852,972
App. No.
15/218,848
Granted
Dec 26, 2017
Kind
B2
Abstract

A semiconductor device has a first semiconductor wafer. The first semiconductor wafer is singulated to provide a first wafer section including at least one first semiconductor die or a plurality of first semiconductor die. The first wafer section is a fractional portion of the first semiconductor wafer. An edge support structure is formed around the first wafer section. A second wafer section includes at least one second semiconductor die. The second wafer section can be an entire second semiconductor wafer. The first semiconductor die is a first type of semiconductor device and the second semiconductor die is a second type of semiconductor device. An alignment opening is formed through the first wafer section and second wafer section with a light source projected through the opening. The first wafer section is bonded to the second wafer section with the first semiconductor die aligned with the second semiconductor die.

Claims (27)

1. A method of making a semiconductor device, comprising:

providing a first semiconductor wafer;

singulating the first semiconductor wafer into a plurality of first wafer sections, wherein each of the plurality of first wafer sections includes a plurality of first semiconductor die;

providing a second wafer section including a plurality of second semiconductor die; and

bonding the plurality of first wafer sections to portions of the second wafer section with the plurality of first semiconductor die each aligned respectively with the plurality of second semiconductor die.

2. The method of claim 1 , wherein each of the first wafer sections is a fractional portion of the first semiconductor wafer.

3. The method of claim 1 , wherein the first semiconductor die is a first type of semiconductor device and the second semiconductor die is a second type of semiconductor device.

4. The method of claim 1 , wherein the second wafer section is an entire second semiconductor wafer.

5. The method of claim 1 , further including forming an alignment opening through each of the first wafer sections and second wafer section.

6. The method of claim 1 , further including forming an edge support structure around each of the first wafer sections.

7. A method of making a semiconductor device, comprising:

providing a plurality of first wafer sections each including a plurality of first semiconductor die;

providing a second wafer section including a plurality of second semiconductor die; and

bonding the plurality of first wafer sections to the second wafer section to align the first semiconductor die to the second semiconductor die.

8. The method of claim 7 , wherein each of the first wafer sections is a fractional portion of a first semiconductor wafer.

9. The method of claim 7 , wherein the second wafer section is an entire second semiconductor wafer.

10. The method of claim 7 , further including forming an alignment opening through each of the first wafer sections and second wafer section.

11. The method of claim 7 , further including forming an edge support structure around each of the first wafer sections.

12. The method of claim 7 , wherein the first semiconductor die is a first type of semiconductor device and the second semiconductor die is a second type of semiconductor device.

13. A semiconductor device, comprising:

a plurality of first wafer sections each including a plurality of first semiconductor die; and

a second wafer section including a plurality of second semiconductor die, wherein the first wafer sections are bonded to the second wafer section to align the first semiconductor die to the second semiconductor die.

14. The semiconductor device of claim 13 , wherein each of the first wafer sections is a fractional portion of a first semiconductor wafer.

15. The semiconductor device of claim 13 , wherein the second wafer section is an entire second semiconductor wafer.

16. The semiconductor device of claim 13 , further including an alignment opening formed through each of the first wafer sections and second wafer section.

17. The semiconductor device of claim 13 , further including an edge support structure formed around each of the first wafer sections.

18. The semiconductor device of claim 13 , wherein the first semiconductor die is a first type of semiconductor device and the second semiconductor die is a second type of semiconductor device.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 041187, FRAME 0295 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064151/0203 →
SECURITY INTEREST Recorded Dec 23, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 041187/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2016
From: SEDDON, MICHAEL J.; CARNEY, FRANCIS J.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 039247/0889 →