IP Library Patent Application 15232525
Patent Application
App. No. 15/232,525

SEMICONDUCTOR DEVICES AND PACKAGES INCLUDING CONDUCTIVE UNDERFILL MATERIAL AND RELATED METHODS

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Quick Facts
Patent No.
US None
App. No.
15/232,525
Abstract

Semiconductor devices and device packages include at least one semiconductor die electrically coupled to a substrate through a plurality of conductive structures. The at least one semiconductor die may be a plurality of memory dice, and the substrate may be a logic die. An underfill material disposed between the at least one semiconductor die and the substrate may include a thermally conductive material. An electrically insulating material is disposed between the plurality of conductive structures and the underfill material. Methods of attaching a semiconductor die to a substrate, such as for forming semiconductor device packages, include covering or coating at least an outer side surface of conductive structures, electrically coupling the semiconductor die to the substrate with an electrically insulating material, and disposing a thermally conductive material between the semiconductor die and the substrate.

Claims (29)

1 . A method of stacking a semiconductor chip having at least one conductive structure onto a substrate having at least one bond pad, the method comprising:

covering a surface of the at least one conductive structure with an adhesive epoxy material comprising an insulating material;

aligning the at least one conductive structure with the at least one bond pad of the substrate and stacking the semiconductor chip onto the substrate; and

removing a portion of the adhesive epoxy material from the at least one conductive structure to connect the at least one conductive structure and the at least one bond pad.

2 . The method of claim 1 , further comprising selecting the adhesive epoxy material to comprise an epoxy component and a flux component, the flux component comprising a material formulated to remove metal oxides from surfaces of the conductive structure.

3 . The method of claim 1 , further comprising selecting the adhesive epoxy material further to comprise at least one of a tackifier component, a thickening agent, a catalyst material, a flow agent, or an adhesion promoter.

4 . The method of claim 1 , wherein covering a surface of the at least one conductive structure with an adhesive epoxy material comprises dipping the at least one conductive structure into a liquid receptacle that includes a reservoir of the adhesive epoxy material.

5 . The method of claim 1 , further comprising heating the semiconductor chip to cure the adhesive epoxy material covering a side surface of the at least one conductive structure.

6 . The method of claim 1 , wherein connecting the at least one conductive structure and the at least one bond pad comprises heating the semiconductor chip to melt at least some of the at least one conductive structure.

7 . The method of claim 11 , wherein connecting the at least one conductive structure and at least one the bond pad comprises pressing the semiconductor chip toward the substrate.

8 . The method of claim 11 , further comprising filling a volume between the semiconductor chip and the substrate with an underfill material comprising conductive particles.

9 . A method of stacking a semiconductor chip having a plurality of conductive structures onto a substrate having a plurality of bond pads, the method comprising:

covering surfaces of the plurality of conductive structures with an adhesive epoxy material comprising an insulating material to form a plurality of covered conductive structures;

disposing the plurality of covered conductive structures over the plurality of bond pads to stack the semiconductor chip on the substrate;

removing portions of the adhesive epoxy material from surfaces of the plurality of covered conductive structures between the plurality of covered conductive structures and the bond pads and electrically connecting the plurality of covered conductive structures to the respective plurality of bond pads.

10 . The method of claim 9 , further comprising selecting the adhesive epoxy material to comprise an epoxy component and a flux component, the flux component comprising a material formulated to remove metal oxides from surfaces of the conductive structure.

11 . The method of claim 9 , further comprising selecting the adhesive epoxy material further to comprise at least one of a tackifier component, a thickening agent, a catalyst material, a flow agent, or an adhesion promoter.

12 . The method of claim 9 , wherein covering surfaces of the plurality of conductive structures with an adhesive epoxy material comprises positioning the semiconductor chip over a liquid receptacle comprising a reservoir of the adhesive epoxy material, dipping the plurality of conductive structures into the adhesive epoxy material to form the plurality of covered conductive structures, and removing the plurality of conductive structures from the liquid receptacle.

13 . The method of claim 9 , further comprising disposing a volume of the adhesive epoxy material around a plurality of the conductive structures and disposing a volume of a thermally and electrically conductive underfill material around the volume of the adhesive epoxy material.

14 . The method of claim 9 , further comprising heating the semiconductor chip to cure the adhesive epoxy material covering side surfaces of the plurality of covered conductive structures.

15 . The method of claim 9 , wherein electrically connecting the plurality of covered conductive structures to the respective plurality of the bond pads comprises heating the semiconductor chip to a temperature to melt at least a portion of each covered conductive structure of the plurality of covered conductive structures.

16 . The method of claim 9 , wherein electrically connecting the plurality of covered conductive structures to the respective plurality of bond pads comprises pressing the semiconductor chip toward the substrate.

17 . The method of claim 9 , further comprising filling a volume between the semiconductor chip and the substrate with an underfill material comprising electrically and thermally conductive particles.

18 . A method of stacking a semiconductor chip having a plurality of conductive structures on a substrate having a plurality of bond pads, the method comprising:

dipping the plurality of conductive structures in an adhesive epoxy material comprising an insulative material to cover outer surfaces of the plurality of conductive structures with the adhesive epoxy material;

stacking the semiconductor chip onto the substrate and coupling the plurality of conductive structures to respective bond pads of the plurality of bond pads; and

electrically coupling the plurality of conductive structures to the respective bond pads of the plurality of bond pads.

19 . The method of claim 18 , wherein electrically coupling the plurality of conductive structures to the respective bond pads of the plurality of bond pads comprises removing a portion of the adhesive epoxy material from each of the plurality of the conductive structures.

20 . The method of claim 18 , further comprising filling a volume between the semiconductor chip and the substrate with an underfill material comprising electrically and thermally conductive particles.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050680/0268 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041671/0902 →