Solid-state imaging device and manufacturing method therefor

1. A solid-state imaging device comprising:

a plurality of pixels, the pixel including

a photoelectric conversion unit including a first semiconductor region of a first conductivity type

a floating diffusion region,

a transfer transistor including a transferring gate electrode configured to transfer signal charge generated at the photoelectric conversion unit to the floating diffusion region,

a transistor having a gate electrode connected to the floating diffusion region, and

a reset transistor configured to reset a voltage of the floating diffusion region;

a signal processing circuit for processing a signal output from the plurality of pixels;

a first semiconductor substrate; and

a second semiconductor substrate,

wherein

the first semiconductor substrate includes a pixel region;

a plurality of the photoelectric conversion units and a plurality of the floating diffusion regions are arranged in the pixel region;

a first element isolation portion is provided in the pixel region, configured to electrically isolate at least a part of the plurality of the photoelectric conversion units and at least a part of the plurality of the floating diffusion regions;

the first element isolation portion includes a second semiconductor region of a second conductivity type which contacts a first insulating film disposed on a first surface of the first semiconductor substrate and a second insulating film disposed on a second surface of the first semiconductor substrate, the second surface being opposite to the first surface,

the second semiconductor substrate includes a circuit region;

a plurality of transistors included in the signal processing circuit are arranged in the circuit region;

a second element isolation portion is arranged in the circuit region, configured to electrically isolate at least a part of the plurality of transistors; and

the second element isolation portion includes an insulator portion.

2. The solid-state imaging device according to claim 1 , further comprising:

an electrically-conductive pattern configured to electrically connect the floating diffusion region and the gate electrode of the transistor,

wherein

the first surface of the first semiconductor substrate faces the second semiconductor substrate,

the electrically-conductive pattern being interposed between the first surface of the first semiconductor substrate and the second semiconductor substrate, and

light is incident on the first semiconductor substrate from the second surface.

3. The solid-state imaging device according to claim 2 , wherein

the second semiconductor region includes a first part extending along the first surface and a second part extending along the second surface, and

the first semiconductor region is arranged between the first part and the second part.

4. The solid-state imaging device according to claim 3 , wherein

the first semiconductor substrate has a thickness where a part of the light reaches the first surface of the first semiconductor substrate, and

the first principal surface of the first semiconductor substrate includes a (1 0 0)-surface.

5. The solid-state imaging device according to claim 4 ,

wherein the floating diffusion region has a higher impurity concentration than an impurity concentration of the first semiconductor region.

6. The solid-state imaging device according to claim 5 ,

the plurality of transistors included in the signal processing circuit includes a silicide formed thereon.

7. The solid-state imaging device according to claim 1 ,

wherein the floating diffusion region has a higher impurity concentration than an impurity concentration of the first semiconductor region,

wherein the plurality of pixels form a matrix including a plurality of pixel columns,

wherein the signal processing circuit includes a plurality of analog-to-digital convertors respectively corresponding to the plurality of pixel columns,

wherein the first surface of the first semiconductor substrate includes a (1 0 0)-surface,

the plurality of transistors included in the signal processing circuit includes a silicide formed thereon,

wherein the first element isolation portion includes a PN isolation,

wherein a reverse bias voltage is applied to a PN junction of the PN isolation, and

wherein the solid-state imaging device further comprises a contact plug configured to supply the reverse bias voltage to the PN isolation,

wherein the first semiconductor substrate has a thickness where a part of the light reaches the first principal surface of the first semiconductor substrate.

8. The solid-state imaging device according to claim 7 , further comprising:

a light shielding portion provided on the second principal surface of the first semiconductor substrate;

a color filter provided on the second principal surface; and

a microlens provided on the second principal surface.

9. A solid-state imaging device comprising:

a plurality of pixels, the pixel including

a photoelectric conversion unit,

a floating diffusion region,

a transferring transistor including a transferring gate electrode configured to transfer signal charge generated at the photoelectric conversion unit to the floating diffusion region,

an amplifying transistor configured to output a signal based on an amount of electric charge of the floating diffusion region, and

a resetting transistor configured to reset a voltage of the floating diffusion region;

a signal processing circuit for processing a signal output from the plurality of pixels;

a first semiconductor substrate; and

a second semiconductor substrate,

wherein a first insulating film is provided on a first principal surface of the first semiconductor substrate,

wherein the first semiconductor substrate includes a pixel region;

wherein a plurality of photoelectric conversion units and a plurality of floating diffusion regions are arranged in the pixel region;

wherein a first element isolation portion is provided in the pixel region, configured to electrically isolate at least a part of the plurality of photoelectric conversion units and at least a part of the plurality of floating diffusion regions;

wherein a second insulating film is provided on the second semiconductor substrate;

wherein the second semiconductor substrate includes a circuit region;

wherein a plurality of transistors included in the signal processing circuit are arranged in the circuit region;

wherein a second element isolation portion is arranged in the circuit region, configured to electrically isolate at least a part of the plurality of transistors;

wherein an interface between the first semiconductor substrate and the first insulating film is flat;

wherein an interface of a region where the second element isolation portion is provided, between the second semiconductor substrate and the second insulating film, is arranged at a first depth with respect to an interface of a region where the transistor included in the signal processing circuit is arranged, between the second semiconductor substrate and the second insulating film; and

wherein the first depth is larger than zero.

10. The solid-state imaging device according to claim 9 , wherein light is incident on the first semiconductor substrate from a second principal surface side thereof, the second principal surface being opposite to the first principal surface of the first semiconductor substrate.

11. The solid-state imaging device according to claim 10 , further comprising:

an electrically-conductive pattern configured to electrically connect the floating diffusion region and a gate electrode of the amplifying transistor,

wherein the first principal surface of the first semiconductor substrate faces a principal surface of the second semiconductor substrate on which the gate electrode of the amplifying transistor is arranged, the electrically-conductive pattern being interposed therebetween.

12. The solid-state imaging device according to claim 11 , wherein the first element isolation portion is one of PN isolation, mesa-type insulator isolation, and EDI isolation, and wherein the second element isolation portion is one of LOCOS isolation and STI isolation.

13. The solid-state imaging device according to claim 12 , wherein the first principal surface of the first semiconductor substrate includes a (1 0 0)-surface.

14. The solid-state imaging device according to claim 13 ,

wherein the plurality of pixels form a matrix including a plurality of pixel columns,

wherein the signal processing circuit includes a plurality of column circuits respectively corresponding to the plurality of pixel columns, and

wherein the column circuit includes an analog-to-digital convertor.

15. The solid-state imaging device according to claim 9 , wherein the photoelectric conversion unit includes:

a first semiconductor region of a first conductivity type configured to collect a signal charge,

a second semiconductor region of a second conductivity type provided between the first semiconductor region and the first principal surface of the first semiconductor substrate, and

a third semiconductor region of the second conductivity type provided between the first semiconductor region and a second principal surface being opposite to the first principal surface of the first semiconductor substrate, and

wherein the first, second and third semiconductor regions forms an embedded-type photodiode.

16. The solid-state imaging device according to claim 15 ,

wherein the floating diffusion region has a higher impurity concentration than an impurity concentration of the first semiconductor region, and

wherein the second semiconductor region has a higher impurity concentration than an impurity concentration of the first element isolation portion.

17. The solid-state imaging device according to claim 16 ,

wherein the transferring transistor includes a channel region implanted with a channel impurity, and

wherein a negative voltage is applied to the transferring gate electrode during an exposure time period.

18. The solid-state imaging device according to claim 17 , wherein the transistor included in the signal processing circuit includes a silicide formed thereon.

19. The solid-state imaging device according to claim 18 , further comprising:

a contact plug configured to supply the reverse bias voltage to the PN isolation.

20. The solid-state imaging device according to claim 19 , further comprising:

a light shielding portion provided on a second principal surface being opposite to the first principal surface of the first semiconductor substrate;

a color filter provided on the second principal surface; and

a microlens provided on the second principal surface.