High-speed, low power spin-orbit torque (SOT) assisted spin-transfer torque magnetic random access memory (STT-MRAM) bit cell array
A magnetic random access memory (MRAM) array including several bit cells is described. Each of the bit cells may include a perpendicular magnetic tunnel junction (pMTJ) including a reference layer, a barrier layer supporting the reference layer, and a free layer supporting the barrier layer. A spin-hall conductive material layer may support the free layer. A driver may be operable to set a state of at least one of the bit cells using an increased spin-transfer torque (STT) current and a spin-hall effect from the spin-hall conductive material layer. The increased STT current may be driven through the spin-hall conductive material layer and the pMTJ so that a spin current is generated from the reference layer and the spin-hall conductive material layer.
1. A magnetic random access memory (MRAM) array, comprising:
a plurality of bit cells, each of the plurality of bit cells comprising:
a perpendicular magnetic tunnel junction (pMTJ) including a reference layer, a barrier layer supporting the reference layer, and a free layer supporting the barrier layer;
a spin-hall conductive material layer supporting the free layer;
at least one transistor coupled to the spin-hall conductive material layer; and
at least two diodes coupled to the spin-hall conductive material layer; and
a driver operable to set a state of at least one of the plurality of bit cells using a spin-transfer torque (STT) switching current and a spin current by driving the STT switching current through both the spin-hall conductive material layer to generate a spin-orbit torque (SOT) and the pMTJ, the SOT generating the spin current through the pMTJ.
2. The MRAM array of claim 1 , further comprising a bit line contact on the reference layer.
3. The MRAM array of claim 1 , further comprising a pair of source line contacts on the spin-hall conductive material layer.
4. The MRAM array of claim 3 , in which a current flows between the pair of source line contacts.
5. The MRAM array of claim 1 , in which each of the plurality of bit cells comprises a one-junction memory cell.
6. The MRAM array of claim 1 , integrated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.
7. A method of storing data in a magnetic random access memory (MRAM) array, comprising:
driving a spin-transfer torque (STT) switching current through at least two diodes, a spin-hall conductive material coupled to the at least two diodes, a transistor coupled to the spin-hall conductive material, and a perpendicular magnetic tunnel junction (pMTJ), the STT switching current generating a spin-orbit torque (SOT) to generate a spin current;
driving the spin current through the pMTJ; and
setting a state of at least one of a plurality of bit cells using the STT switching current and the spin current.
8. The method of claim 7 , further comprising contacting a bit line on the reference layer.
9. The method of claim 7 , in which the spin-hall conductive material comprises a pair of source line contacts.
10. The method of claim 9 , further comprising flowing a current between the pair of source line contacts.
11. The method of claim 7 , further comprising tuning an MTJ resistance and a spin-hall conductive material resistance to direct the STT switching current through the pMTJ to set a write value.
12. The method of claim 7 , further comprising tuning a resistance area product according to the STT switching current.
13. The method of claim 7 , further comprising incorporating the MRAM array into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.
14. A magnetic random access memory (MRAM) array, comprising:
a plurality of bit cells, each of the plurality of bit cells comprising:
a perpendicular magnetic tunnel junction (pMTJ) including a reference layer, a barrier layer supporting the reference layer, and a free layer supporting the barrier layer;
a spin-hall conductive material layer supporting the free layer;
at least one transistor coupled to the spin-hall conductive material layer; and
at least two diodes coupled to the spin-hall conductive material layer; and
means for setting a state of at least one of the plurality of bit cells using a spin-transfer torque (STT) switching current and a spin current by driving the STT switching current through both the spin-hall conductive material layer to generate a spin-orbit torque (SOT) and the pMTJ, the SOT generating the spin current through the pMTJ.
15. The MRAM array of claim 14 , further comprising a bit line contact on the reference layer.
16. The MRAM array of claim 14 , further comprising a pair of source line contacts on the spin-hall conductive material layer.
17. The MRAM array of claim 14 , in which at least one of the plurality of bit cells comprises a one-junction memory cell.
18. The MRAM array of claim 14 , integrated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a personal digital assistant (PDA), a fixed location data unit, a mobile phone, and a portable computer.