IP Library Granted Patent US 9,805,817
Granted Patent B2
US 9,805,817 · App. 15/251,993 · Granted Oct 31, 2017

Apparatuses and/or methods for operating a memory cell as an anti-fuse

Inventor: Andrea Redaelli (Casatenovo, IT)
Assignee: MICRON TECHNOLOGY, INC.
G11C17/18G11C13/0004G11C13/0069G11C17/14G11C17/16G11C17/165G11C14/009G11C2213/52G11C2213/72
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Quick Facts
Patent No.
US 9,805,817
App. No.
15/251,993
Granted
Oct 31, 2017
Kind
B2
Abstract

Embodiments disclosed herein relate to operating a memory cell as an anti-fuse, such as for use in phase change memory, for example.

Claims (30)

1. A method of operating a phase change memory (PCM) cell as an anti-fuse, the PCM cell comprising phase change material in electrical contact with a metal plug along an electrical path between two electrodes; the method comprising:

providing a voltage across the two electrodes so as to provide a forward biased current pulse; the forward biased current pulse resulting in electro-migration from the metal plug so as to form a metallic path through the phase change material of the PCM cell, wherein the PCM cell is included in a memory array; and

operating an other PCM cell in the memory array as a fuse, wherein operating the other PCM cell in the memory array as a fuse comprises forming a void in the other PCM cell.

2. The method of claim 1 , wherein actuating a bipolar transistor selector (BJT) provides the forward biased current pulse.

3. The method of claim 1 , wherein actuating a diode provides the forward biased current pulse.

4. The method of claim 1 , wherein actuating a field effect transistor selector provides the forward biased current pulse.

5. The method of claim 1 , wherein forming the void in the other PCM cell includes actuating a field effect transistor selector for the other PCM cell to provide sufficient current to form the void.

6. A method of operating a phase change memory (PCM) cell as an anti-fuse, the PCM cell comprising phase change material in electrical contact with a metal plug along an electrical path between two electrodes; the method comprising:

providing a voltage across the two electrodes so as to provide a forward biased current pulse; the forward biased current pulse resulting in electro-migration from the metal plug so as to form a metallic path through the phase change material of the PCM cell, wherein the forward biased current pulse has a duration approximately in a range of from approximately 1 microseconds to approximately 10 milliseconds.

7. A method of operating a phase change memory (PCM) cell as an anti-fuse, the PCM cell comprising phase change material in electrical contact with a metal plug along an electrical path between two electrodes; the method comprising:

providing a voltage across the two electrodes so as to provide a forward biased current pulse; the forward biased current pulse resulting in electro-migration from the metal plug so as to form a metallic path through the phase change material of the PCM cell, wherein the forward biased current pulse has a current level approximately in a range of from approximately 1 milliamp to approximately 5 milliamps.

8. A method of operating a phase change memory (PCM) cell as an anti-fuse, the PCM cell comprising phase change material in electrical contact with a metal plug along an electrical path between two electrodes; the method comprising:

providing a voltage across the two electrodes so as to provide a forward biased current pulse; the forward biased current pulse resulting in electro-migration from the metal plug so as to form a metallic path through the phase change material of the PCM cell, wherein the forward biased current pulse has a current density approximately in a range of from approximately 500 MegaAmps/cm2 to approximately 1000 MegaAmps/cm2.

9. A method comprising:

applying a voltage across a first electrode and second electrode;

providing a forward biased current pulse to a phase change memory (PCM) storage component of a PCM cell based at least in part on the voltage, wherein a duration for which the forward biased current pulse is applied, or a density of the forward biased current pulse, or both, are configured to form a resistance path through the PCM storage component; and

forming a void in the PCM cell, wherein the void is formed in the PCM storage component, adjacent to the PCM storage component, or a combination thereof.

10. The method of claim 9 , further comprising:

identifying a resistance level of the PCM storage component; and

removing the forward biased current pulse based at least in part on the PCM storage component reaching a predetermined resistance level.

11. The method of claim 9 , wherein the resistance path formed by the forward biased current pulse is more electrically conductive than the PCM storage component.

12. The method of claim 11 , wherein the resistance path formed by the forward biased current pulse is less electrically conductive than the PCM storage component.

13. An apparatus comprising:

a phase change memory (PCM) cell comprising:

a PCM storage component;

a metal plug; and

a selector configured to provide a forward bias through the metal plug to the PCM storage component, wherein the forward bias is configured to cause migration of metallic ions from the metal plug to form a resistance path through the PCM storage component, and wherein the resistance path is at least partially surrounded by the PCM storage component.

14. The apparatus of claim 13 , wherein the PCM cell further comprises a conductive heater between the PCM storage component and the metal plug, wherein the forward bias is configured to cause migration of the metallic ions from the metal plug through the conductive heater and through the PCM storage component.

15. The apparatus of claim 13 , wherein the resistance path has a different electrical conductivity than the PCM storage component.

16. The apparatus of claim 13 , wherein the PCM storage component comprises an electrode that includes a capping material.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050680/0268 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041671/0902 →
Continuity (3)
Division 14986329 · Dec 31, 2015
Division 13543469 · Jul 6, 2012
Related Publication 20170053709A1 · Feb 23, 2017