Optimized wires for resistance or electromigration
View Patent ↗Optimized metal wires for resistance or electromigration, methods of manufacturing thereof and design methodologies are disclosed. The method includes depositing metal material within openings and on a surface of dielectric material resulting in metal filled openings and a topography of recessed areas aligned with the metal filled openings. The method further includes depositing an alloying material over the metal material, including within the recessed areas. The method further includes planarizing the metal material, leaving the alloying material within the recessed areas. The method further includes diffusing the alloying material into the metal material forming alloyed regions self-aligned with the metal filled openings.
1. A method, comprising:
determining whether metal lines are to need electromigration (EM) resistance through circuit analysis by supplying a current through the metal lines and determining whether an EM threshold has been met;
assigning a shape of the metal lines that require EM resistance;
constructing a mask for the shape using a material that generate the mask; and
determining timing for the assigned shape of the metal lines by propagation of a signal through the metal line.
2. The method of claim 1 , wherein the shape of the metal line is provided by constructing a new mask for forming an opening in a capping layer.
3. The method of claim 1 , wherein each metal line is analyzed for EM concerns for low resistance case.
4. The method of claim 3 , wherein when the metal lines pass the circuit analysis, the metal line will remain low resistance and the timing will be closed with this condition.
5. The method of claim 4 , wherein when the metal lines fail the circuit analysis, a new design shape is added to the metal lines to construct a mask.
6. The method of claim 5 , further comprising controlling out diffusion of material into a copper line to adjust the alloying effect and EM effects by changing a shape of the mask.
7. The method of claim 1 , wherein the circuit analysis is based on a dimension of the metal line and an overall circuit requirement.
8. The method of claim 1 , wherein increasing a resistance of the metal lines slows the propagation of the signal through the metal line.