IP Library Granted Patent US 9,787,202
Granted Patent B2
US 9,787,202 · App. 15/275,888 · Granted Oct 10, 2017

Method for regulating an output voltage using a converter configured to operate in a critical conduction mode and a frequency fold-back mode and structure

Inventor: Joel Turchi (Garonne sur Garonne, FR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02M3/33546H02M1/42H02M1/4225H02M1/44H02M2001/0032Y02B70/126Y02B70/16Y02P80/112
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Quick Facts
Patent No.
US 9,787,202
App. No.
15/275,888
Granted
Oct 10, 2017
Kind
B2
Abstract

In accordance with an embodiment, a converter includes a power factor controller that varies the switching frequency of a switching transistor in accordance with a signal representative of power at the input of the converter.

Claims (23)

1. A method for regulating an output voltage, comprising:

providing a converter circuit having an input and an output, wherein the converter circuit is coupled to receive a current at the input of the converter circuit and generate a switching signal at the output of the converter circuit;

generating an inductor current that flows through a first inductor in response to a load condition on the converter circuit and a switching activity of a switching device;

operating the converter circuit in a critical conduction mode in response to a signal representative of power at the input being greater than a first preset reference voltage, wherein, in the critical conduction mode, the inductor current increases from a first level to a second level over a first period of time, decreases from the second level to the first level over a second period of time, increases from the first level to the second level over a third period of time, and decreases from the second level to the first level over a fourth period of time; and

generating a dead-time in the inductor current by operating the converter circuit in a frequency fold-back mode in response to the signal representative of power at the input being less than the first preset reference voltage, wherein, in the frequency fold-back mode, the inductor current increases from a third level to a fourth level over a fifth period of time in response to the controller generating a drive signal and the switching device being on, the inductor current decreases from the fourth level to the third level over a sixth period of time in response to the controller generating the drive signal that turns off the switching device, the inductor current remains at the third level over a seventh period of time in response to the controller generating the drive signal that leaves the switching device off, and the inductor current increases from the third level to the fourth level over an eighth period of time in response to the controller generating the drive signal that turns on the switching device.

2. The method of claim 1 , wherein the signal representative of the power at the input is a signal that is representative of a magnitude of the inductor current.

3. The method of claim 2 , further including operating the converter circuit in the critical conduction mode in response to a signal that is representative of a magnitude of the input power being greater than the first preset reference voltage.

4. The method of claim 1 , further including deriving the signal representative of the power at the input using an error amplifier.

5. The method of claim 1 , wherein generating the dead-time in the inductor current includes generating the dead-time in response to a signal that is representative of the magnitude of the input power being lower than the first preset reference voltage.

6. The method of claim 1 , further including increasing the dead-time in response to a decay of a signal representative of the power at the input.

7. The method of claim 1 , further including providing a second preset reference voltage, the first preset reference voltage greater than the second preset reference voltage, and skipping cycles of the inductor current from the input of the converter in response to the signal representative of the power at the input being less than the second preset reference voltage.

8. The method of claim 1 , further including deriving the signal representative of the power at the input using an output signal of a regulation block.

9. The method of claim 8 , wherein the regulation block regulates an output voltage to a desired level.

10. A method for regulating an output voltage, comprising:

providing a converter circuit having an input and an output, wherein the converter circuit is coupled to receive a current at the input, generate a switching signal at the output, and wherein the converter circuit comprises:

a regulator stage having first and second inputs and an output;

a control stage having first and second inputs and first and second outputs, the first output of the control stage configured to convert a first signal into a content signal that carries information about the first signal, the content signal being a signal that is representative of a magnitude of an inductor current; and

an output stage having first and second inputs and an output, the first input of the output stage coupled to the output of the regulator stage and the second input of the output stage coupled to the first output of the control stage;

operating the converter circuit in a critical conduction mode in response to the content signal being greater than a first preset reference voltage, wherein in the critical conduction mode the inductor current increases from a first level to a second level over a first period of time, decreases from the second level to the first level over a second period of time, increases from the first level to the second level over a third period of time, and decreases from the second level to the first level over a fourth period of time; and

generating a dead-time in the inductor current in response to the content signal by operating the converter circuit in a frequency fold-back mode in response to the content signal being less than the first preset reference voltage, wherein in the frequency fold-back mode the inductor current increases from a third level to a fourth level over a fifth period of time in response to the controller generating a drive signal and the switching device being on, the inductor current decreases from the fourth level to the third level over a sixth period of time in response to the controller generating the drive signal that turns off the switching device, the inductor current remains at the third level over a seventh period of time in response to the controller generating the drive signal that leaves the switching device off, and the inductor current increases from the third level to the fourth level over an eighth period of time in response to the controller generating the drive signal that turns on the switching device.

11. The method of claim 10 , further including increasing the dead-time in response to a decay of the content signal.

12. The method of claim 10 , further including providing a second preset reference voltage, the first preset reference voltage greater than the second preset reference voltage, and skipping cycles of the current from the input of the converter in response to the content signal being less than the second preset reference voltage.

13. The method of claim 10 , further including deriving the content signal representative of the magnitude of the inductor current using an error amplifier.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 041187, FRAME 0295 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064151/0203 →
SECURITY INTEREST Recorded Dec 23, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 041187/0295 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2016
From: TURCHI, JOEL
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 039856/0447 →
Continuity (2)
Division 13990884
Related Publication 20170012544A1 · Jan 12, 2017