IP Library Granted Patent US 10,014,311
Granted Patent B2
US 10,014,311 · App. 15/295,577 · Granted Jul 3, 2018

Methods of forming an array of elevationally-extending strings of memory cells, methods of forming polysilicon, elevationally-extending strings of memory cells individually comprising a programmable charge storage transistor, and electronic components comprising polysilicon

Inventors: Dimitrios Pavlopoulos (Boise, ID); Kunal Shrotri (Boise, ID); Anish A. Khandekar (Boise, ID)
Assignee: Micron Technology, Inc.
H01L27/11568H01L27/11519H01L27/11521H01L27/11556H01L27/11565H01L27/11582H01L29/66825H01L29/66833H01L29/788H01L29/792
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,014,311
App. No.
15/295,577
Granted
Jul 3, 2018
Kind
B2
Abstract

A method of forming poly silicon comprises forming a first polysilicon-comprising material over a substrate, with the first polysilicon-comprising material comprising at least one of elemental carbon and elemental nitrogen at a total of 0.1 to 20 atomic percent. A second polysilicon-comprising material is formed over the first poly silicon-comprising material. The second polysilicon-comprising material comprises less, if any, total elemental carbon and elemental nitrogen than the first polysilicon-comprising material. Other aspects and embodiments, including structure independent of method of manufacture, are disclosed.

Claims (35)

1. A method of forming an array of elevationally-extending strings of memory cells, the memory cells individually comprising a programmable charge storage transistor, the method comprising:

forming vertically-alternating tiers of different composition materials;

forming elevationally-extending channel openings into the vertically-alternating tiers;

forming polysilicon-comprising channel material in the channel openings, the forming of the polysilicon-comprising channel material comprising:

forming a first polysilicon-comprising material in the channel openings, the first polysilicon-comprising material comprising elemental carbon at a total of 0.1 to 20 atomic percent, the first polysilicon-comprising material not comprising elemental-form nitrogen; and

forming a second polysilicon-comprising material in the channel openings over the first polysilicon-comprising material, the second polysilicon-comprising material comprising total elemental carbon that is from zero to less than the total of the elemental carbon that is in the first polysilicon-comprising material; and

providing control gate material, control gate blocking insulator, programmable charge storage material, and tunnel insulator operably proximate the channel material.

2. The method of claim 1 wherein the second polysilicon-comprising material is formed directly against the first polysilicon-comprising material.

3. The method of claim 1 wherein the total elemental carbon in the second polysilicon-comprising material is zero to 0.001 atomic percent.

4. The method of claim 1 wherein the total elemental carbon in the first polysilicon-comprising material is 0.5 to 2 atomic percent.

5. The method of claim 1 comprising forming the first polysilicon-comprising material to be thinner than the second polysilicon-comprising material.

6. The method of claim 1 comprising forming the first polysilicon-comprising material to be thicker than the second polysilicon-comprising material.

7. The method of claim 1 comprising forming the first polysilicon-comprising material to a thickness that is 2 to 70 percent of thickness of the second polysilicon-comprising material.

8. The method of claim 1 comprising forming the vertically-alternating tiers to be vertically-alternating insulating material and the control gate material prior to forming the channel openings.

9. The method of claim 1 comprising forming the vertically-alternating tiers to be different composition insulating materials prior to forming the channel openings.

10. The method of claim 4 wherein the total elemental carbon in the second polysilicon-comprising material is zero to 0.001 atomic percent.

11. The method of claim 7 comprising forming the first polysilicon-comprising material to a thickness that is 2 to 30 percent of thickness of the second polysilicon-comprising material.

12. A method of forming an array of elevationally-extending strings of memory cells, the memory cells individually comprising a programmable charge storage transistor, the method comprising:

forming vertically-alternating tiers of different composition materials;

forming elevationally-extending channel openings into the vertically-alternating tiers;

forming polysilicon-comprising channel material in the channel openings, the forming of the polysilicon-comprising channel material comprising:

forming a first polysilicon-comprising material in the channel openings, the first polysilicon-comprising material comprising at least one of elemental carbon and elemental nitrogen at a total of 0.1 to 20 atomic percent; and

forming a second polysilicon-comprising material in the channel openings over the first polysilicon-comprising material, the second polysilicon-comprising material comprising total elemental carbon and elemental nitrogen that is from zero to less than the total of the at least one of elemental carbon and elemental nitrogen that is in the first polysilicon-comprising material;

providing control gate material, control gate blocking insulator, programmable charge storage material, and tunnel insulator operably proximate the channel material; and

the first polysilicon-comprising material comprises comprising both elemental carbon and elemental nitrogen.

13. The method of claim 12 wherein the total of the at least one of elemental carbon and elemental nitrogen in the first polysilicon-comprising material is 0.5 to 2 atomic percent.

14. A method of forming an array of elevationally-extending strings of memory cells, the memory cells individually comprising a programmable charge storage transistor, the method comprising:

forming vertically-alternating tiers of different composition materials;

forming elevationally-extending channel openings into the vertically-alternating tiers;

forming polysilicon-comprising channel material in the channel openings, the forming of the polysilicon-comprising channel material comprising:

forming a first polysilicon-comprising material in the channel openings, the first polysilicon-comprising material comprising at least one of elemental carbon and elemental nitrogen at a total of 0.1 to 20 atomic percent; and

forming a second polysilicon-comprising material in the channel openings over the first polysilicon-comprising material, the second polysilicon-comprising material comprising total elemental carbon and elemental nitrogen that is from zero to less than the total of the at least one of elemental carbon and elemental nitrogen that is in the first polysilicon-comprising material;

providing control gate material, control gate blocking insulator, programmable charge storage material, and tunnel insulator operably proximate the channel material; and further comprising:

forming the first polysilicon-comprising material and the second polysilicon-comprising material to have at least 30 percent 111 crystal orientation as measured by EBSD.

15. The method of claim 14 comprising forming the first polysilicon-comprising material and the second polysilicon-comprising material to have at least 50 percent 111 crystal orientation as measured by EBSD.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050680/0268 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041671/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2016
From: PAVLOPOULOS, DIMITRIOS; SHROTRI, KUNAL; KHANDEKAR, ANISH A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 040034/0070 →
Continuity (1)
Related Publication 20180108670A1 · Apr 19, 2018