Method and system for integrated circuit design with on-chip variation and spatial correlation
An integrated circuit (IC) design method includes receiving a spatial correlation matrix, R, of certain property of post-fabrication IC devices; and deriving a random number generation function g(x, y) such that random numbers for a device at a coordinate (x, y) can be generated by g(x, y) independent of other devices, and all pairs of random numbers satisfy the spatial correlation matrix R. The method further includes receiving an IC design layout having pre-fabrication IC devices, each of the pre-fabrication IC devices having a coordinate and a first value of the property. The method further includes generating random numbers using the coordinates of the pre-fabrication IC devices and the function g(x, y); deriving second values of the property by applying the random numbers to the first values; and providing the second values to an IC simulation tool.
1. A method for a computerized integrated circuit (IC) design tool, comprising:
receiving a spatial correlation matrix, wherein each element in the spatial correlation matrix is a spatial correlation between values of a property of a set of post-fabrication IC devices having different coordinates;
deriving a random number generation function from the spatial correlation matrix, wherein the random number generation function has a coordinate-dependent factor and a coordinate-independent factor;
receiving an IC design layout having a set of pre-fabrication IC devices, each of the pre-fabrication IC devices having a coordinate and a first value of the property;
for each of the pre-fabrication IC devices, generating a random number using the coordinate of the respective pre-fabrication IC device and the random number generation function;
for each of the pre-fabrication IC devices, deriving a second value of the property by applying the random number to the first value;
running a simulation on the pre-fabrication IC devices with the second values of the property of the pre-fabrication IC devices; and
modifying the IC design layout based on a result of the simulation,
wherein at least one of the following operations is performed by a computer:
the deriving of the random number generation function;
the generating of the random number;
the deriving of the second value of the property; and
the running of the simulation.
2. The method of claim 1 , wherein the spatial correlation matrix is represented as:
R
=
[
R
0
,
0
_
0
,
0
R
0
,
0
_
1
,
0
…
R
0
,
0
_
M
,
0
R
0
,
0
_
0
,
1
R
0
,
0
_
1
,
1
…
…
R
0
,
0
_
0
,
N
R
0
,
0
_
M
,
N
]
where R a,b_c,d =correlation between the values of the property of the set of the post-fabrication IC devices at coordinates (x a , y b ) and (x c , y d ), each of a and c ranges in [0, M] and each of b and d ranges in [0, N], wherein M and N are integers greater than 1; and
wherein the deriving of the random number generation function includes:
performing a 2-dimensional Discrete Fourier Transformation (2-D DFT) to R, thereby deriving spatial frequencies u and v, such that:
R
0
,
0
_
x
,
y
=
1
∑
u
=
-
N
N
∑
v
=
-
M
M
F
(
u
,
v
)
∑
u
=
-
N
N
∑
v
=
-
M
M
[
F
(
u
,
v
)
·
cos
(
2
π
u
2
N
+
1
x
+
2
π
v
2
M
+
1
y
)
]
;
constructing the random number generation function g(x, y), wherein:
g
(
x
,
y
)
=
∑
u
=
-
N
N
∑
v
=
-
M
M
[
F
(
u
,
v
)
∑
u
=
-
N
N
∑
v
=
-
M
M
F
(
u
,
v
)
·
(
cos
(
2
π
u
2
N
+
1
·
x
+
2
π
v
2
M
+
1
·
y
)
±
sin
(
2
π
u
2
N
+
1
·
x
+
2
π
v
2
M
+
1
·
y
)
)
·
gauss
uv
]
wherein gauss uv is a random number having a Gaussian distribution.
3. The method of claim 2 , further comprising, before the generating of the random number using the coordinate of the respective pre-fabrication IC device and the random number generation function g(x, y):
pruning terms of the random number generation function g(x, y).
4. The method of claim 1 , wherein the property of the set of IC devices includes one of: capacitance, resistance, propagation delay, signal rise time, signal fall time, transistor threshold voltage, saturation region current, and linear region current.
5. The method of claim 1 , wherein the deriving of the second value of the property by applying the random number to the first value includes multiplying the first value with a sum of one and the random number.
6. The method of claim 1 , further comprising:
taping out the IC design layout.
7. The method of claim 1 , wherein the spatial correlation matrix is represented as:
R
=
[
R
0
,
0
_
0
,
0
R
0
,
0
_
1
,
0
…
R
0
,
0
_
M
,
N
R
1
,
0
_
0
,
0
R
1
,
0
_
1
,
0
…
…
R
M
,
N
_
0
,
0
R
M
,
N
_
M
,
N
]
where R a,b_c,d =correlation between the values of the property of the post-fabrication IC devices at coordinates (x a , y b ) and (x c , y d ), each of a and c ranges in [0, M] and each of b and d ranges in [0, N], wherein M and N are integers greater than 1; and
wherein the deriving of the random number generation function includes:
deriving eigenvalues, λ 1 . . . λ k , and eigenvectors, ν 1 . . . ν k , of R, such that:
R
=
[
λ
1
0
…
0
λ
K
]
[
v
1
…
v
K
]
T
;
and
constructing a random number generation function g(x, y), wherein:
g
(
x
,
y
)
=
∑
i
=
1
K
[
λ
i
·
v
(
x
,
y
)
]
·
gauss
i
wherein gauss i is a random number having a Gaussian distribution.
8. The method of claim 7 , further comprising:
deriving the coordinate-independent factor, A i , and the coordinate-dependent factor, Ω i (x, y), wherein:
A i =√{square root over (λ i )}
Ω i ( x,y )=ν i ( x,y ); and
pruning terms of (A i ·Ω i (x, y)) from the random number generation function g(x, y) when A i is less than a threshold.
9. A method for integrated circuit (IC) design, comprising:
receiving a spatial correlation matrix, R, of values of a property of a set of post-fabrication IC devices, wherein:
R
=
[
R
0
,
0
_
0
,
0
R
0
,
0
_
1
,
0
…
R
0
,
0
_
M
,
N
R
1
,
0
_
0
,
0
R
1
,
0
_
1
,
0
…
…
R
M
,
N
_
0
,
0
R
M
,
N
_
M
,
N
]
Where R a,b_c,d =Correlation between the values of the property of the post-fabrication IC devices at coordinates (x a , y b ) and (x c , y d ), each of a and c ranges in [0, M] and each of b and d ranges in [0, N], wherein M and N are integers greater than 1;
deriving eigenvalues, λ 1 . . . λ k , and eigenvectors, ν 1 . . . ν k , of R, such that:
R
=
[
λ
1
0
…
0
λ
K
]
[
v
1
…
v
K
]
T
;
constructing a random number generation function g(x, y), wherein:
g
(
x
,
y
)
=
∑
i
=
1
K
[
λ
i
·
v
(
x
,
y
)
]
·
gauss
i
wherein gauss i is a random number having a Gaussian distribution;
receiving an IC design layout having a set of pre-fabrication IC devices, each of the pre-fabrication IC devices having a coordinate and a first value of the property;
for each of the pre-fabrication IC devices, generating a random number using the coordinate of the respective pre-fabrication IC device and the random number generation function g(x, y);
for each of the pre-fabrication IC devices, deriving a second value of the property by multiplying the first value with a sum of one and the random number; and
storing the IC design layout with the second values of the property of the pre-fabrication IC devices in a non-transitory memory for use by an IC simulation tool in a process of manufacturing the IC design layout onto wafers,
wherein at least one of the following operations is performed by a computer:
the deriving of the eigenvalues and eigenvectors of R;
the constructing of the random number generation function g(x, y);
the generating of the random number using the coordinate of the respective pre-fabrication IC device and the function g(x, y); and
the deriving of the second value of the property.
10. The method of claim 9 , further comprising:
receiving the set of post-fabrication integrated circuit (IC) devices;
measuring the values of the property of the post-fabrication IC devices; and
deriving the spatial correlation matrix R.
11. The method of claim 10 , wherein the set of post-fabrication integrated circuit (IC) devices are fabricated on one or more test wafers.
12. The method of claim 9 , further comprising:
deriving a coordinate-independent factor A, and a coordinate-dependent factor Ω i (x, y), wherein:
A i =√{square root over (λ i )}
Ω i ( x,y )=ν i ( x,y ); and
pruning terms of (A i ·Ω i (x, y)) from the random number generation function g(x, y) when A i is less than a threshold.
13. The method of claim 9 , further comprising:
running a simulation of the IC design layout with the second values of the property of the pre-fabrication IC devices.
14. The method of claim 13 , further comprising:
modifying the IC design layout if the simulation of the IC design layout is not satisfactory.
15. The method of claim 13 , further comprising:
on condition that the simulation of the IC design layout is satisfactory, taping-out the IC design layout.
16. An integrated circuit (IC) design system, comprising:
a non-transitory memory;
one or more hardware processors coupled to the non-transitory memory, the one or more hardware processors to execute instructions to perform operations comprising:
receiving a spatial correlation matrix, R, of values of a property of a set of post-fabrication IC devices, wherein each element R a,b_c,d in R is a correlation between the values of the property of the set of the post-fabrication IC devices at coordinates (x a , y b ) and (x c , y d ), wherein each of a and c ranges in [0, M] and each of b and d ranges in [0, N], wherein M and N are integers greater than 1;
performing a 2-dimensional Discrete Fourier Transformation (2-D DFT) to R, thereby deriving spatial frequencies u and v wherein each pair of the spatial frequencies u and v has a partial correlation at each of coordinates (x, y), such that:
R
0
,
0
_
x
,
y
=
1
∑
u
=
-
N
N
∑
v
=
-
M
M
F
(
u
,
v
)
∑
u
=
-
N
N
∑
v
=
-
M
M
[
F
(
u
,
v
)
·
cos
(
2
π
u
2
N
+
1
x
+
2
π
v
2
M
+
1
y
)
]
;
and
constructing a random number generation function g(x, y) based on the spatial frequencies u and v to generate random numbers at the coordinates (x, y) for randomizing values of the property, wherein:
g
(
x
,
y
)
=
∑
u
=
-
N
N
∑
v
=
-
M
M
[
F
(
u
,
v
)
∑
u
=
-
N
N
∑
v
=
-
M
M
F
(
u
,
v
)
·
(
cos
(
2
π
u
2
N
+
1
·
x
+
2
π
v
2
M
+
1
·
y
)
±
sin
(
2
π
u
2
N
+
1
·
x
+
2
π
v
2
M
+
1
·
y
)
)
·
gauss
uv
]
wherein gauss uv is a random number having a Gaussian distribution.
17. The IC design system of claim 16 , the operations further comprising:
receiving an IC design layout having a set of pre-fabrication IC devices, each of the pre-fabrication IC devices having a coordinate and a first value of the property;
generating random numbers using the coordinates of the pre-fabrication IC devices and the random number generation function g(x, y); and
deriving second values of the property by applying the random numbers to the first values.
18. The IC design system of claim 17 , the operations further comprising:
simulating the IC design layout with the second values of the property of the pre-fabrication IC devices.
19. The IC design system of claim 18 , the operations further comprising:
taping-out the IC design layout when the simulation of the IC design layout is satisfactory.
20. The IC design system of claim 16 , the operations further comprising:
pruning terms of the random number generation function g(x, y).