IP Library Granted Patent US 9,748,384
Granted Patent B2
US 9,748,384 · App. 15/371,826 · Granted Aug 29, 2017

Semiconductor component and manufacturing method thereof

Inventor: Koichi Amari (Kanagawa, JP)
Assignee: SONY CORPORATION
H01L29/7834H01L29/4236H01L29/66545H01L29/66666H01L29/7827H01L29/7843
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Quick Facts
Patent No.
US 9,748,384
App. No.
15/371,826
Granted
Aug 29, 2017
Kind
B2
Abstract

A semiconductor component including: a semiconductor substrate; and a semiconductor device provided thereon, the device being a field-effect transistor that includes: a gate insulating film provided on the substrate; a gate electrode provided via the film; and a pair of source-drain regions provided to sandwich the electrode, the substrate including a patterned surface in a portion where the electrode is provided, the patterned surface of the substrate including a raised portion where the film is formed to cover a surface that lies on the same plane as a surface of the pair of source-drain regions, and the electrode is formed on a top surface of the film, and the patterned surface of the substrate including a recessed portion where the film is formed to cover surfaces of a groove formed toward the interior than the surface of the pair of source-drain regions, and the electrode is formed so as to fill the groove provided with the film.

Claims (24)

1. A semiconductor component comprising:

a semiconductor substrate; and

a semiconductor device provided on the semiconductor substrate,

wherein,

the semiconductor device is a field-effect transistor with a gate insulating film on the semiconductor substrate, a gate electrode on the gate insulating film, and a pair of source-drain regions sandwiching the gate electrode,

the semiconductor substrate includes a patterned surface in a portion where the field-effect transistor is provided,

the patterned surface includes a raised portion on which the gate insulating layer and the gate electrode are located,

the patterned surface of the semiconductor substrate includes recesses opposite sides of the raised portion, the source-drain regions being located in the recesses, and

the source-drains regions have top surface regions that are below the raised surface of the semiconductor substrate.

2. The semiconductor component of claim 1 , further comprising grooves on opposite edges of the raised portion and on opposite sides of the gate electrode, the source-drain regions have lower impurity concentration regions within the grooves and higher impurity concentration regions within the recesses.

3. The semiconductor device of claim 2 , wherein the lower impurity concentration regions have surfaces in a same plane as top surface of the raised portion, and the higher concentration regions have the surface regions that are located below the surfaces of the lower concentration regions.

4. The semiconductor component according to claim 3 , wherein a surface of the groove on the patterned surface of the semiconductor substrate lies on a (111) plane.

5. A semiconductor component comprising:

a semiconductor substrate; and

a semiconductor device provided on the semiconductor substrate,

wherein,

the semiconductor device is a field-effect transistor with a gate insulating film on the semiconductor substrate, a gate electrode on the gate insulating film, source-drain regions sandwiching the gate electrode, and stress layers covering the source-drain regions,

the semiconductor substrate includes a patterned surface in a portion where the field-effect transistor is provided,

the patterned surface includes a raised portion on which the gate insulating layer and the gate electrode are located,

the patterned surface of the semiconductor substrate includes recesses opposite sides of the raised portion, the source-drain regions being located in the recesses, and

the source-drains regions have top surface regions that are in a same plane as a top surface of the raised portion of the semiconductor substrate.

6. The semiconductor component of claim 5 , further comprising grooves on opposite edges of the raised portion and on opposite sides of the gate electrode, the source-drain regions have lower impurity concentration regions within the grooves and higher impurity concentration regions within the recesses.

7. The semiconductor device of claim 6 , wherein the lower impurity concentration regions have surfaces in a same plane as top surface of the raised portion, and the higher concentration regions have the surface regions that are located below the surfaces of the lower concentration regions.

8. The semiconductor component according to claim 5 , wherein the source-drain regions extend to a same depth in the semiconductor substrate substrate.

Priority Claims (1)
JP 2009-298319 · Dec 28, 2009 · national
Continuity (3)
Continuation 14573771 · Dec 17, 2014
Continuation 12967857 · Dec 14, 2010
Related Publication 20170092762A1 · Mar 30, 2017