Granted Patent B2

US 10,134,834 · App. 15/372,713 · Granted Nov 20, 2018

Abstract

Claims (48)

1. A transistor device, comprising:

a drift layer having a first conductivity type;

a body layer on the drift layer, the body layer having a second conductivity type opposite the first conductivity type;

a source region on the body layer, the source region having the first conductivity type;

a trench extending through the source region and the body layer and into the drift layer, the trench having an inner sidewall and a floor;

a channel layer on the inner sidewall of the trench between the trench and the source region;

a second conductivity type region beneath the floor of the trench, wherein a width of the second conductivity type region is less than the width of the trench;

a gate insulator on the channel layer and the second conductivity type region; and

a gate contact on the gate insulator.

2. The transistor device of claim 1 , wherein an upper portion of the drift layer adjacent the trench is doped with first conductivity type dopants more heavily than a lower portion of the drift layer to form a current spreading region in the upper portion of the drift layer.

3. The transistor device of claim 2 , wherein the trench extends into but not through the current spreading region.

4. The transistor device of claim 1 , further comprising:

a body contact region having the second conductivity type extending through the source region and the body layer; and

a buried well region having the second conductivity type in the drift layer and in electrical contact with the body contact region, the buried well region extending towards the second conductivity type region.

5. The transistor device of claim 4 , wherein a width of the buried well region is greater than a width of the body contact region.

6. The transistor device of claim 1 , wherein the gate insulator directly contacts the second conductivity type region.

7. The transistor device of claim 1 , wherein the gate insulator extends over the channel layer and onto a top surface of the source region.

8. The transistor device of claim 1 , wherein the channel layer has the second conductivity type.

9. A transistor device, comprising:

a drift layer having a first conductivity type;

a body layer on the drift layer, the body layer having a second conductivity type opposite the first conductivity type;

a source region on the body layer, the source region having the first conductivity type;

a trench extending through the source region and the body layer and into the drift layer, the trench having an inner sidewall and a floor;

a gate insulator on the inner sidewall and floor of the trench;

a body contact region having the second conductivity type extending through the source region and into the body layer;

a buried region having the second conductivity type in the drift layer beneath the gate insulator; and

a buried well region having the second conductivity type in the drift layer and in electrical contact with the body contact region, the buried well region extending towards the buried region.

10. The transistor device of claim 9 , wherein an upper portion of the drift layer adjacent the trench is doped with first conductivity type dopants more heavily than a lower portion of the drift layer to form a current spreading region in the upper portion of the drift layer; and

wherein the buried well region extends into, but not through the upper portion of the drift layer.

11. The transistor device of claim 9 , further comprising:

an epitaxial channel layer having the second conductivity type on a sidewall of the trench between the trench and the source region; and

a gate electrode on the gate insulator.

12. The transistor device of claim 11 , wherein the gate insulator extends over the epitaxial channel layer, and wherein the gate electrode extends onto the gate insulator over the epitaxial channel layer.

13. The transistor device of claim 9 , wherein an upper portion of the drift layer adjacent the trench is doped with first conductivity type dopants more heavily than a lower portion of the drift layer to form a current spreading region in the upper portion of the drift layer, and wherein the buried region extends into, but not through the upper portion of the drift layer.

14. The transistor device of claim 9 , wherein a width of the buried region is less than the width of the trench.

15. A transistor device, comprising:

a drift layer having a first conductivity type;

a body layer on the drift layer, the body layer having a second conductivity type opposite the first conductivity type;

a source region on the body layer, the source region having the first conductivity type;

a trench extending through the source region and the body layer and into the drift layer, the trench having an inner sidewall and a floor;

a first layer having the second conductivity type on the inner sidewall of the trench;

a second layer having the second conductivity type on the floor of the trench;

a gate conductor layer on the first layer and the second layer;

a body contact region having the second conductivity type extending through the source region and the body layer; and

a buried well region having the second conductivity type in the drift layer and in electrical contact with the body contact region, the buried well region extending towards the trench.

16. The transistor device of claim 15 , wherein an upper portion of the drift layer adjacent the trench is doped with first conductivity type dopants more heavily than a lower portion of the drift layer.

17. The transistor device of claim 15 , wherein the first layer is an epitaxial channel layer on the inner sidewall of the trench between the trench and the source region, and

wherein a width of the second layer is less than a width of the trench.

Assignments (7)