Semiconductor device and method of manufacturing the same, and electronic apparatus
A semiconductor device is provided as a back-illuminated solid-state imaging device. The device is manufactured by bonding a first semiconductor wafer with a pixel array in a half-finished product state and a second semiconductor wafer with a logic circuit in a half-finished product state together, making the first semiconductor wafer into a thin film, electrically connecting the pixel array and the logic circuit, making the pixel array and the logic circuit into a finished product state, and dividing the first semiconductor wafer and the second semiconductor being bonded together into microchips.
1. An imaging device, comprising:
a first semiconductor substrate having a light-incident side and including a pixel section, the pixel section including a plurality of photodiodes and at least one of a plurality of transfer transistors, reset transistors, and amplification transistors;
a second semiconductor substrate having at least a portion of a signal processing circuit, wherein the first semiconductor substrate and the second semiconductor substrate are bonded to each other;
a first multi-wiring layer formed at a side opposite to the light-incident side of the first semiconductor substrate, wherein the first multi-wiring layer is electrically connected to the pixel section;
a second multi-wiring layer formed at a first side of the second semiconductor substrate, wherein the side opposite to the light-incident side of the first semiconductor substrate and the first side of the second semiconductor substrate face each other, and wherein the signal processing circuit includes at least a plurality of wirings of the second multi-wiring layer and a plurality of transistors; and
an electrode disposed in a peripheral section other than the pixel section, wherein the electrode is coupled to a wiring in the second multi-wiring layer such that the wiring in the second multi-wiring layer is electrically connected to an external wiring,
wherein,
the first multi-wiring layer includes a plurality of first connection portions that directly connect to a plurality of second connection portions in the second multi-wiring layer, and
at least one connection portion of the plurality of first connection portions or the plurality of second connection portions is disposed in an area horizontally located between the pixel section and the electrode.
2. The imaging device of claim 1 , further comprising:
an insulating layer between the electrode and the light-incident side of the first semiconductor substrate.
3. The imaging device of claim 1 , further comprising:
a through-connection conductor coupled to the electrode.
4. The imaging device of claim 3 , further comprising:
a connection through-hole in which the through-connection conductor is disposed.
5. The imaging device of claim 4 , further comprising:
a second insulating layer disposed on at least a part of an inner wall of the connection through-hole.
6. The imaging device of claim 3 , wherein the through-connection conductor connects at least a lower wiring layer of the first multi-wiring layer and at least an upper wiring layer of the second multi-wiring layer.
7. The imaging device of claim 6 , wherein the lower wiring layer of the first multi-wiring layer is connected to other wiring layers in the first multi-wiring layer.
8. The imaging device of claim 3 , wherein the through-connection conductor connects a lowest wiring layer of the first multi-wiring layer and an uppermost wiring layer of the second multi-wiring layer.
9. The imaging device of claim 3 , wherein the through-connection conductor connects the pixel section and a logic circuit.
10. The imaging device of claim 3 , wherein the electrode is connected to the through-connection conductor and another connection conductor.
11. The imaging device of claim 3 , further including a micro-lens formed at the light-incident side of the first semiconductor substrate, wherein the through-connection conductor is formed in a predetermined area not corresponding to the micro-lens on the light-incident side of the first semiconductor substrate.
12. The imaging device of claim 1 , wherein the first semiconductor substrate and the second semiconductor substrate are bonded to each other so that the first multi-wiring layer and the second multi-wiring layer face each other.
13. The imaging device of claim 1 , wherein a thickness of the first semiconductor substrate is less than a thickness of the second semiconductor substrate.
14. The imaging device of claim 1 , further including a color filter formed at the light-incident side of the first semiconductor substrate.
15. The imaging device of claim 1 , wherein the plurality of first connection portions and the plurality of second connection portions are copper wirings.
16. The imaging device of claim 1 , wherein the first semiconductor substrate and the second semiconductor substrate are bonded by using a plasma bonding.
17. The imaging device of claim 1 , wherein at least one of a plasma TEOS film, a plasma SiN film, a SiON film, or a SiC film is formed on a bonding surface of the first semiconductor substrate or the second semiconductor substrate.
18. The imaging device of claim 1 , wherein a first connection portion of the plurality of first connection portions and a second connection portion of the plurality of second connection portions is disposed in an area between the pixel section and the signal processing circuit.
19. The imaging device of claim 1 , wherein an insulating interlayer of the first semiconductor substrate contacts an insulating interlayer of the second semiconductor substrate.
20. An electronic apparatus, comprising:
an imaging device, including:
a first semiconductor substrate having a light-incident side and including a pixel section, the pixel section including a plurality of photodiodes and at least one of a plurality of transfer transistors, reset transistors, and amplification transistors,
a second semiconductor substrate having at least a portion of a signal processing circuit, wherein the first semiconductor substrate and the second semiconductor substrate are bonded to each other,
a first multi-wiring layer formed at a side opposite to the light-incident side of the first semiconductor substrate, wherein the first multi-wiring layer is electrically connected to the pixel section,
a second multi-wiring layer formed at a first side of the second semiconductor substrate, wherein the side opposite to the light-incident side of the first semiconductor substrate and the first side of the second semiconductor substrate face each other, and wherein the signal processing circuit includes at least a plurality of wirings of the second multi-wiring layer and a plurality of transistors, and
an electrode disposed in a peripheral section other than the pixel section, wherein the electrode is coupled to a wiring in the second multi-wiring layer such that the wiring in the second multi-wiring layer is electrically connected to an external wiring,
wherein,
the first multi-wiring layer includes a plurality of first connection portions that directly connect to a plurality of second connection portions in the second multi-wiring layer, and
at least one connection portion of the plurality of first connection portions or the plurality of second connection portions is disposed in an area horizontally located between the pixel section and the electrode; and
a signal processing circuit that processes an output signal from the imaging device.