IP Library Granted Patent US 10,483,222
Granted Patent B1
US 10,483,222 · App. 15/383,923 · Granted Nov 19, 2019

Semiconductor device and manufacturing method thereof

Inventors: Jong Sik Paek (Seongnam-si, KR); Eun Sook Sohn (Seoul, KR); In Bae Park (Seoul, KR); Won Chul Do (Seoul, KR); Glenn A. Rinne (Taipei, TW)
Assignee: Amkor Technology, Inc.
H01L24/05H01L24/11H01L24/13H01L2224/0401H01L2224/05008H01L2224/05015H01L2224/11334H01L2224/13014H01L2224/13024
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Quick Facts
Patent No.
US 10,483,222
App. No.
15/383,923
Granted
Nov 19, 2019
Kind
B1
Abstract

A semiconductor device and a manufacturing method thereof are disclosed. A first insulation layer is formed on a semiconductor die, a redistribution layer electrically connected to a bond pad is formed on the first insulation layer, and a second insulation layer covers the redistribution layer. The second insulation layer is made of a cheap, non-photosensitive material. Accordingly, the manufacturing cost of the semiconductor device can be reduced.

Claims (48)

1. A semiconductor device comprising:

a semiconductor die comprising:

a top die surface; and

a bond pad on the top die surface;

a conductive layer comprising a first end coupled to the bond pad, wherein the conductive layer extends laterally from the bond pad over the top die surface;

a conductive interconnection structure coupled to a second end of the conductive layer; and

an insulation layer formed directly on the conductive interconnection structure and on the conductive layer, the insulation layer comprising a single continuous layer of a non-photosensitive material that laterally surrounds a lower portion of the conductive interconnection structure and does not laterally surround an upper portion of the conductive interconnection structure,

wherein:

the lower portion of the conductive interconnection structure that is surrounded by the insulation layer is shaped like a portion of a sphere, the portion of the sphere comprising a curvature in a vertical cross-sectional view; and

the single continuous layer of the non-photosensitive material that laterally surrounds the lower portion of the conductive interconnection structure conforms, in the vertical cross-sectional view, to said curvature.

2. The semiconductor device of claim 1 , wherein the insulation layer comprises a bottom side that faces toward the semiconductor die, and a top side that is exposed from the completed semiconductor device.

3. The semiconductor device of claim 1 , wherein:

the conductive layer comprises only a seed layer and a single electroplated layer on the seed layer; and

the conductive interconnection structure is entirely above the conductive layer.

4. The semiconductor device of claim 1 , wherein the single continuous layer of the non-photosensitive material is formed to laterally surround and conform to a pre-existing shape of the conductive interconnection structure.

5. The semiconductor device of claim 1 , wherein the insulation layer is directly on the conductive layer.

6. The semiconductor device of claim 1 , wherein:

a first contacting surface of the single continuous layer of the non-photosensitive material directly contacts the conductive interconnection structure; and

no part of the first contacting surface is linear.

7. The semiconductor device of claim 1 , comprising a passivation layer between the insulation layer and the top die surface, wherein the passivation layer comprises an aperture through which the bond pad is coupled to the first end of the conductive layer.

8. The semiconductor device of claim 7 , comprising a lower insulation layer between the conductive layer and the passivation layer, the lower insulation layer comprising a photosensitive material and a bond pad aperture through which the bond pad is coupled to the first end of the conductive layer.

9. The semiconductor device of claim 1 , wherein no portion of any lateral side surface of the conductive interconnection structure is straight.

10. The semiconductor device of claim 1 , wherein:

the conductive layer comprises a pad with a diameter D and a trace extending from the pad with a width of W;

the conductive interconnection structure is coupled to the pad and has a height greater than 235 um; and

W is less than half of D.

11. The semiconductor device of claim 1 , wherein the first end of the conductive layer is directly coupled to the bond pad.

12. A method of manufacturing a semiconductor device, the method comprising:

providing a semiconductor die that comprises:

a top die surface; and

a bond pad on the top die surface;

providing a conductive layer comprising a first end coupled to the bond pad, wherein the conductive layer extends laterally from the bond pad over the top die surface;

providing a conductive interconnection structure coupled to a second end of the conductive layer; and

providing an insulation layer formed directly on the conductive interconnection structure and on the conductive layer, the insulation layer comprising a single continuous layer of a non-photosensitive material that laterally surrounds a lower portion of the conductive interconnection structure and does not laterally surround an upper portion of the conductive interconnection structure,

wherein:

the lower portion of the conductive interconnection structure that is surrounded by the insulation layer is shaped like a portion of a sphere, the portion of the sphere comprising a curvature in a vertical cross-sectional view; and

the single continuous layer of the non-photosensitive material that laterally surrounds the lower portion of the conductive interconnection structure conforms, in the vertical cross-sectional view, to said curvature.

13. The method of claim 12 , wherein the insulation layer comprises a bottom side that faces toward the semiconductor die, and a top side that is exposed from the completed semiconductor device.

14. The method of claim 12 , wherein:

the conductive layer comprises only a seed layer and a single electroplated layer on the seed layer; and

the conductive interconnection structure is entirely above the conductive layer.

15. The method of claim 14 , wherein the lower portion of the conductive interconnection structure that is surrounded by the insulation layer comprises a convex conductive surface portion that is convex in a direction toward the provided conductive layer.

16. The method of claim 15 , wherein the conductive interconnection structure comprises an upper convex conductive surface portion that is convex in a direction away from the conductive layer and protrudes upward from the insulation layer.

17. The method of claim 12 , wherein the single continuous layer of the non-photosensitive material is formed to laterally surround and conform to a pre-existing shape of the conductive interconnection structure.

18. The method of claim 12 , wherein the insulation layer is directly on the conductive layer.

19. The method of claim 12 , wherein:

a first contacting surface of the single continuous layer of the non-photosensitive material directly contacts the conductive interconnection structure; and

no part of the first contacting surface is linear.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2020
From: AMKOR TECHNOLOGY, INC.
To: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE.LTD.
Reel/Frame 054046/0673 →
SECURITY INTEREST Recorded Aug 1, 2018
From: AMKOR TECHNOLOGY, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 046683/0139 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2016
From: PAEK, JONG SIK; SOHN, EUN SOOK; PARK, IN BAE; DO, WON CHUL; RINNE, GLENN A.
To: AMKOR TECHNOLOGY, INC.
Reel/Frame 041155/0790 →
Continuity (2)
Continuation 13738669 · Jan 10, 2013
Continuation 12728119 · Mar 19, 2010