Non-volatile memory device
According to an embodiment, a non-volatile memory device includes first electrodes stacked on an underlying layer, a second electrode provided on the first electrodes, a semiconductor layer extending in a first direction from the underlying layer to the second electrode, and a memory film provided between each of the first electrodes and the semiconductor layer. The semiconductor layer includes a first portion adjacent to the first electrodes and a second portion adjacent to the second electrode. The second portion has a thickness thinner than a thickness of the first portion in a second direction perpendicular to the first direction.
1. A non-volatile memory device comprising:
first electrodes stacked in a first direction above an underlying layer;
a second electrode provided above the first electrodes in the first direction;
a first semiconductor layer extending in the first direction through the first electrodes;
a first core layer being adjacent to the first semiconductor layer in a second direction crossing the first direction, the first semiconductor layer being provided between the first electrodes and the first core layer, and a first portion of the first semiconductor layer being positioned between one of the first electrodes and the first core layer and having a first thickness in the second direction;
a second semiconductor layer extending in the first direction through the second electrode and being connected to the first semiconductor layer;
a second core layer provided above the first core layer in the first direction and being adjacent to the second semiconductor layer in the second direction, a first portion of the second semiconductor layer being positioned between the second electrode and the second core layer and having a second thickness in the second direction thinner than the first thickness; and
a memory film provided between at least one of the first electrodes and the first semiconductor layer.
2. The device according to claim 1 , wherein
the second semiconductor layer includes a second portion provided between the first core layer and the second core layer.
3. The device according to claim 1 , wherein
a top surface of the first core layer is positioned at a level under a bottom surface of the second electrode in the first direction.
4. The device according to claim 2 , wherein
a bottom surface of the second semiconductor layer is positioned at a level under a bottom surface of the second electrode in the first direction.
5. The device according to claim 1 , further comprising:
a gate insulating film provided between the second electrode and the second semiconductor layer,
wherein the gate insulating film is different in material from the memory film.
6. The device according to claim 1 , wherein
the first semiconductor layer and the second semiconductor layer include ring-shaped parts respectively in a cross-section crossing the first direction and including the second direction; and
the first core layer and the second core layer are provided inside the ring-shaped parts respectively.
7. The device according to claim 1 , further comprising:
a third electrode provided between the underlying layer and the first electrodes,
wherein a second portion of the first semiconductor layer is positioned between the third electrode and the first core layer, and has a third thickness in the second direction thicker than the second thickness.
8. The device according to claim 1 , further comprising:
a conductive layer provided between the underlying layer and the first electrodes; and
an interconnection provided above the second electrode in the first direction, wherein
a bottom end of the first semiconductor layer is electrically connected to the conductive layer, and
the first semiconductor layer is electrically connected to the interconnection via the second semiconductor layer.
9. The device according to claim 1 , wherein
the second electrode has a thickness in the first direction thicker than respective thicknesses in the first direction of the first electrodes.
10. A non-volatile memory device comprising:
first electrodes stacked in a first direction above an underlying layer;
a second electrode provided above the first electrodes in the first direction;
a third electrode provided between the underlying layer and the first electrodes;
a first semiconductor layer extending in the first direction through the first electrodes and the third electrode;
a first core layer being adjacent to the first semiconductor layer in a second direction crossing the first direction, a first portion of the first semiconductor layer being positioned between the third electrode and the first core layer and having a first thickness in the second direction;
a second semiconductor layer extending in the first direction through the second electrode and being connected to the first semiconductor layer;
a second core layer provided above the first core layer and being adjacent to the second semiconductor layer in the second direction, a first portion of the second semiconductor layer being positioned between the second electrode and the second core layer and having a second thickness in the second direction thinner than the first thickness; and
a memory film provided between at least one of the first electrodes and the first semiconductor layer.
11. A non-volatile memory device comprising:
first electrodes stacked in a first direction above a underlying layer;
a second electrode provided above the first electrodes in the first direction;
a third electrode provided between the underlying layer and the first electrodes;
a first semiconductor layer extending in the first direction above the underlying layer;
a second semiconductor layer extending in the first direction and electrically connected to the first semiconductor layer, the second semiconductor layer having a thickness, in a second direction perpendicular to the first direction, thinner than a thickness in the second direction of the first semiconductor layer;
a memory film provided between at least one of the first electrodes and the first semiconductor layer;
a first core layer being adjacent to the first semiconductor layer in the second direction, the first semiconductor layer being provided between the first core layer and the first electrodes and between the first core layer and the third electrode; and
a second core layer provided above the first core layer in the first direction and being adjacent to the second semiconductor layer in the second direction, the second semiconductor layer being provided between the second core layer and the second electrode.
12. The device according to claim 11 , wherein
the second semiconductor layer includes a bottom portion provided between the first core layer and the second core layer.
13. The device according to claim 11 , wherein
a top surface of the first core layer is positioned at a level under a bottom surface of the second electrode in the first direction.
14. The device according to claim 12 , wherein
a bottom surface of the second semiconductor layer is positioned at a level under a bottom surface of the second electrode in the first direction.
15. The device according to claim 11 , wherein
a portion of the second semiconductor layer positioned between the second electrode and the second core layer has a thickness in the second direction thinner than a thickness in the second direction of a portion of the first semiconductor layer positioned between one of the first electrodes and the first core layer.
16. The device according to claim 11 , wherein
a portion of the second semiconductor layer positioned between the second electrode and the second core layer has a thickness in the second direction thinner than a thickness in the second direction of a portion of the first semiconductor layer positioned between the third electrode and the first core layer.
17. The device according to claim 11 , further comprising:
a conductive layer provided between the underlying layer and the third electrode; and
an interconnection provided above the second electrode in the first direction, wherein
the first semiconductor layer is electrically connected to the conductive layer, and
the second semiconductor layer is electrically connected to the interconnection.
18. The device according to claim 11 , further comprising:
a gate insulating film provided between the second semiconductor layer and the second electrode, wherein
the gate insulating film is different in material from the memory film.
19. The device according to claim 11 , wherein
the first semiconductor layer and the second semiconductor layer include ring-shaped parts respectively in a cross-section crossing the first direction and including the second direction, and
the first core layer and the second core layer are provided inside the ring-shaped parts respectively.
20. The device according to claim 11 , wherein
the second electrode has a thickness in the first direction thicker than respective thicknesses in the first direction of the first electrodes.